atsamd21g18a 0.7.1

Peripheral access API for ATSAMD21G18A microcontrollers (generated using svd2rust)
Documentation 
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#[doc = "Reader of register VREG"]
pub type R = crate::R<u16, super::VREG>;
#[doc = "Writer for register VREG"]
pub type W = crate::W<u16, super::VREG>;
#[doc = "Register VREG `reset()`'s with value 0"]
impl crate::ResetValue for super::VREG {
    type Type = u16;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Reader of field `RUNSTDBY`"]
pub type RUNSTDBY_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RUNSTDBY`"]
pub struct RUNSTDBY_W<'a> {
    w: &'a mut W,
}
impl<'a> RUNSTDBY_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u16) & 0x01) << 6);
        self.w
    }
}
#[doc = "Reader of field `FORCELDO`"]
pub type FORCELDO_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `FORCELDO`"]
pub struct FORCELDO_W<'a> {
    w: &'a mut W,
}
impl<'a> FORCELDO_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u16) & 0x01) << 13);
        self.w
    }
}
impl R {
    #[doc = "Bit 6 - Run in Standby"]
    #[inline(always)]
    pub fn runstdby(&self) -> RUNSTDBY_R {
        RUNSTDBY_R::new(((self.bits >> 6) & 0x01) != 0)
    }
    #[doc = "Bit 13 - Force LDO Voltage Regulator"]
    #[inline(always)]
    pub fn forceldo(&self) -> FORCELDO_R {
        FORCELDO_R::new(((self.bits >> 13) & 0x01) != 0)
    }
}
impl W {
    #[doc = "Bit 6 - Run in Standby"]
    #[inline(always)]
    pub fn runstdby(&mut self) -> RUNSTDBY_W {
        RUNSTDBY_W { w: self }
    }
    #[doc = "Bit 13 - Force LDO Voltage Regulator"]
    #[inline(always)]
    pub fn forceldo(&mut self) -> FORCELDO_W {
        FORCELDO_W { w: self }
    }
}