atsamd21g18a/tcc0/
wave.rs1#[doc = "Reader of register WAVE"]
2pub type R = crate::R<u32, super::WAVE>;
3#[doc = "Writer for register WAVE"]
4pub type W = crate::W<u32, super::WAVE>;
5#[doc = "Register WAVE `reset()`'s with value 0"]
6impl crate::ResetValue for super::WAVE {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Waveform Generation\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum WAVEGEN_A {
17 #[doc = "0: Normal frequency"]
18 NFRQ = 0,
19 #[doc = "1: Match frequency"]
20 MFRQ = 1,
21 #[doc = "2: Normal PWM"]
22 NPWM = 2,
23 #[doc = "4: Dual-slope critical"]
24 DSCRITICAL = 4,
25 #[doc = "5: Dual-slope with interrupt/event condition when COUNT reaches ZERO"]
26 DSBOTTOM = 5,
27 #[doc = "6: Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP"]
28 DSBOTH = 6,
29 #[doc = "7: Dual-slope with interrupt/event condition when COUNT reaches TOP"]
30 DSTOP = 7,
31}
32impl From<WAVEGEN_A> for u8 {
33 #[inline(always)]
34 fn from(variant: WAVEGEN_A) -> Self {
35 variant as _
36 }
37}
38#[doc = "Reader of field `WAVEGEN`"]
39pub type WAVEGEN_R = crate::R<u8, WAVEGEN_A>;
40impl WAVEGEN_R {
41 #[doc = r"Get enumerated values variant"]
42 #[inline(always)]
43 pub fn variant(&self) -> crate::Variant<u8, WAVEGEN_A> {
44 use crate::Variant::*;
45 match self.bits {
46 0 => Val(WAVEGEN_A::NFRQ),
47 1 => Val(WAVEGEN_A::MFRQ),
48 2 => Val(WAVEGEN_A::NPWM),
49 4 => Val(WAVEGEN_A::DSCRITICAL),
50 5 => Val(WAVEGEN_A::DSBOTTOM),
51 6 => Val(WAVEGEN_A::DSBOTH),
52 7 => Val(WAVEGEN_A::DSTOP),
53 i => Res(i),
54 }
55 }
56 #[doc = "Checks if the value of the field is `NFRQ`"]
57 #[inline(always)]
58 pub fn is_nfrq(&self) -> bool {
59 *self == WAVEGEN_A::NFRQ
60 }
61 #[doc = "Checks if the value of the field is `MFRQ`"]
62 #[inline(always)]
63 pub fn is_mfrq(&self) -> bool {
64 *self == WAVEGEN_A::MFRQ
65 }
66 #[doc = "Checks if the value of the field is `NPWM`"]
67 #[inline(always)]
68 pub fn is_npwm(&self) -> bool {
69 *self == WAVEGEN_A::NPWM
70 }
71 #[doc = "Checks if the value of the field is `DSCRITICAL`"]
72 #[inline(always)]
73 pub fn is_dscritical(&self) -> bool {
74 *self == WAVEGEN_A::DSCRITICAL
75 }
76 #[doc = "Checks if the value of the field is `DSBOTTOM`"]
77 #[inline(always)]
78 pub fn is_dsbottom(&self) -> bool {
79 *self == WAVEGEN_A::DSBOTTOM
80 }
81 #[doc = "Checks if the value of the field is `DSBOTH`"]
82 #[inline(always)]
83 pub fn is_dsboth(&self) -> bool {
84 *self == WAVEGEN_A::DSBOTH
85 }
86 #[doc = "Checks if the value of the field is `DSTOP`"]
87 #[inline(always)]
88 pub fn is_dstop(&self) -> bool {
89 *self == WAVEGEN_A::DSTOP
90 }
91}
92#[doc = "Write proxy for field `WAVEGEN`"]
93pub struct WAVEGEN_W<'a> {
94 w: &'a mut W,
95}
96impl<'a> WAVEGEN_W<'a> {
97 #[doc = r"Writes `variant` to the field"]
98 #[inline(always)]
99 pub fn variant(self, variant: WAVEGEN_A) -> &'a mut W {
100 unsafe { self.bits(variant.into()) }
101 }
102 #[doc = "Normal frequency"]
103 #[inline(always)]
104 pub fn nfrq(self) -> &'a mut W {
105 self.variant(WAVEGEN_A::NFRQ)
106 }
107 #[doc = "Match frequency"]
108 #[inline(always)]
109 pub fn mfrq(self) -> &'a mut W {
110 self.variant(WAVEGEN_A::MFRQ)
111 }
112 #[doc = "Normal PWM"]
113 #[inline(always)]
114 pub fn npwm(self) -> &'a mut W {
115 self.variant(WAVEGEN_A::NPWM)
116 }
117 #[doc = "Dual-slope critical"]
118 #[inline(always)]
119 pub fn dscritical(self) -> &'a mut W {
120 self.variant(WAVEGEN_A::DSCRITICAL)
121 }
122 #[doc = "Dual-slope with interrupt/event condition when COUNT reaches ZERO"]
123 #[inline(always)]
124 pub fn dsbottom(self) -> &'a mut W {
125 self.variant(WAVEGEN_A::DSBOTTOM)
126 }
127 #[doc = "Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP"]
128 #[inline(always)]
129 pub fn dsboth(self) -> &'a mut W {
130 self.variant(WAVEGEN_A::DSBOTH)
131 }
132 #[doc = "Dual-slope with interrupt/event condition when COUNT reaches TOP"]
133 #[inline(always)]
134 pub fn dstop(self) -> &'a mut W {
135 self.variant(WAVEGEN_A::DSTOP)
136 }
137 #[doc = r"Writes raw bits to the field"]
138 #[inline(always)]
139 pub unsafe fn bits(self, value: u8) -> &'a mut W {
140 self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
141 self.w
142 }
143}
144#[doc = "Ramp Mode\n\nValue on reset: 0"]
145#[derive(Clone, Copy, Debug, PartialEq)]
146#[repr(u8)]
147pub enum RAMP_A {
148 #[doc = "0: RAMP1 operation"]
149 RAMP1 = 0,
150 #[doc = "1: Alternative RAMP2 operation"]
151 RAMP2A = 1,
152 #[doc = "2: RAMP2 operation"]
153 RAMP2 = 2,
154}
155impl From<RAMP_A> for u8 {
156 #[inline(always)]
157 fn from(variant: RAMP_A) -> Self {
158 variant as _
159 }
160}
161#[doc = "Reader of field `RAMP`"]
162pub type RAMP_R = crate::R<u8, RAMP_A>;
163impl RAMP_R {
164 #[doc = r"Get enumerated values variant"]
165 #[inline(always)]
166 pub fn variant(&self) -> crate::Variant<u8, RAMP_A> {
167 use crate::Variant::*;
168 match self.bits {
169 0 => Val(RAMP_A::RAMP1),
170 1 => Val(RAMP_A::RAMP2A),
171 2 => Val(RAMP_A::RAMP2),
172 i => Res(i),
173 }
174 }
175 #[doc = "Checks if the value of the field is `RAMP1`"]
176 #[inline(always)]
177 pub fn is_ramp1(&self) -> bool {
178 *self == RAMP_A::RAMP1
179 }
180 #[doc = "Checks if the value of the field is `RAMP2A`"]
181 #[inline(always)]
182 pub fn is_ramp2a(&self) -> bool {
183 *self == RAMP_A::RAMP2A
184 }
185 #[doc = "Checks if the value of the field is `RAMP2`"]
186 #[inline(always)]
187 pub fn is_ramp2(&self) -> bool {
188 *self == RAMP_A::RAMP2
189 }
190}
191#[doc = "Write proxy for field `RAMP`"]
192pub struct RAMP_W<'a> {
193 w: &'a mut W,
194}
195impl<'a> RAMP_W<'a> {
196 #[doc = r"Writes `variant` to the field"]
197 #[inline(always)]
198 pub fn variant(self, variant: RAMP_A) -> &'a mut W {
199 unsafe { self.bits(variant.into()) }
200 }
201 #[doc = "RAMP1 operation"]
202 #[inline(always)]
203 pub fn ramp1(self) -> &'a mut W {
204 self.variant(RAMP_A::RAMP1)
205 }
206 #[doc = "Alternative RAMP2 operation"]
207 #[inline(always)]
208 pub fn ramp2a(self) -> &'a mut W {
209 self.variant(RAMP_A::RAMP2A)
210 }
211 #[doc = "RAMP2 operation"]
212 #[inline(always)]
213 pub fn ramp2(self) -> &'a mut W {
214 self.variant(RAMP_A::RAMP2)
215 }
216 #[doc = r"Writes raw bits to the field"]
217 #[inline(always)]
218 pub unsafe fn bits(self, value: u8) -> &'a mut W {
219 self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4);
220 self.w
221 }
222}
223#[doc = "Reader of field `CIPEREN`"]
224pub type CIPEREN_R = crate::R<bool, bool>;
225#[doc = "Write proxy for field `CIPEREN`"]
226pub struct CIPEREN_W<'a> {
227 w: &'a mut W,
228}
229impl<'a> CIPEREN_W<'a> {
230 #[doc = r"Sets the field bit"]
231 #[inline(always)]
232 pub fn set_bit(self) -> &'a mut W {
233 self.bit(true)
234 }
235 #[doc = r"Clears the field bit"]
236 #[inline(always)]
237 pub fn clear_bit(self) -> &'a mut W {
238 self.bit(false)
239 }
240 #[doc = r"Writes raw bits to the field"]
241 #[inline(always)]
242 pub fn bit(self, value: bool) -> &'a mut W {
243 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
244 self.w
245 }
246}
247#[doc = "Reader of field `CICCEN0`"]
248pub type CICCEN0_R = crate::R<bool, bool>;
249#[doc = "Write proxy for field `CICCEN0`"]
250pub struct CICCEN0_W<'a> {
251 w: &'a mut W,
252}
253impl<'a> CICCEN0_W<'a> {
254 #[doc = r"Sets the field bit"]
255 #[inline(always)]
256 pub fn set_bit(self) -> &'a mut W {
257 self.bit(true)
258 }
259 #[doc = r"Clears the field bit"]
260 #[inline(always)]
261 pub fn clear_bit(self) -> &'a mut W {
262 self.bit(false)
263 }
264 #[doc = r"Writes raw bits to the field"]
265 #[inline(always)]
266 pub fn bit(self, value: bool) -> &'a mut W {
267 self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
268 self.w
269 }
270}
271#[doc = "Reader of field `CICCEN1`"]
272pub type CICCEN1_R = crate::R<bool, bool>;
273#[doc = "Write proxy for field `CICCEN1`"]
274pub struct CICCEN1_W<'a> {
275 w: &'a mut W,
276}
277impl<'a> CICCEN1_W<'a> {
278 #[doc = r"Sets the field bit"]
279 #[inline(always)]
280 pub fn set_bit(self) -> &'a mut W {
281 self.bit(true)
282 }
283 #[doc = r"Clears the field bit"]
284 #[inline(always)]
285 pub fn clear_bit(self) -> &'a mut W {
286 self.bit(false)
287 }
288 #[doc = r"Writes raw bits to the field"]
289 #[inline(always)]
290 pub fn bit(self, value: bool) -> &'a mut W {
291 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
292 self.w
293 }
294}
295#[doc = "Reader of field `CICCEN2`"]
296pub type CICCEN2_R = crate::R<bool, bool>;
297#[doc = "Write proxy for field `CICCEN2`"]
298pub struct CICCEN2_W<'a> {
299 w: &'a mut W,
300}
301impl<'a> CICCEN2_W<'a> {
302 #[doc = r"Sets the field bit"]
303 #[inline(always)]
304 pub fn set_bit(self) -> &'a mut W {
305 self.bit(true)
306 }
307 #[doc = r"Clears the field bit"]
308 #[inline(always)]
309 pub fn clear_bit(self) -> &'a mut W {
310 self.bit(false)
311 }
312 #[doc = r"Writes raw bits to the field"]
313 #[inline(always)]
314 pub fn bit(self, value: bool) -> &'a mut W {
315 self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
316 self.w
317 }
318}
319#[doc = "Reader of field `CICCEN3`"]
320pub type CICCEN3_R = crate::R<bool, bool>;
321#[doc = "Write proxy for field `CICCEN3`"]
322pub struct CICCEN3_W<'a> {
323 w: &'a mut W,
324}
325impl<'a> CICCEN3_W<'a> {
326 #[doc = r"Sets the field bit"]
327 #[inline(always)]
328 pub fn set_bit(self) -> &'a mut W {
329 self.bit(true)
330 }
331 #[doc = r"Clears the field bit"]
332 #[inline(always)]
333 pub fn clear_bit(self) -> &'a mut W {
334 self.bit(false)
335 }
336 #[doc = r"Writes raw bits to the field"]
337 #[inline(always)]
338 pub fn bit(self, value: bool) -> &'a mut W {
339 self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
340 self.w
341 }
342}
343#[doc = "Reader of field `POL0`"]
344pub type POL0_R = crate::R<bool, bool>;
345#[doc = "Write proxy for field `POL0`"]
346pub struct POL0_W<'a> {
347 w: &'a mut W,
348}
349impl<'a> POL0_W<'a> {
350 #[doc = r"Sets the field bit"]
351 #[inline(always)]
352 pub fn set_bit(self) -> &'a mut W {
353 self.bit(true)
354 }
355 #[doc = r"Clears the field bit"]
356 #[inline(always)]
357 pub fn clear_bit(self) -> &'a mut W {
358 self.bit(false)
359 }
360 #[doc = r"Writes raw bits to the field"]
361 #[inline(always)]
362 pub fn bit(self, value: bool) -> &'a mut W {
363 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
364 self.w
365 }
366}
367#[doc = "Reader of field `POL1`"]
368pub type POL1_R = crate::R<bool, bool>;
369#[doc = "Write proxy for field `POL1`"]
370pub struct POL1_W<'a> {
371 w: &'a mut W,
372}
373impl<'a> POL1_W<'a> {
374 #[doc = r"Sets the field bit"]
375 #[inline(always)]
376 pub fn set_bit(self) -> &'a mut W {
377 self.bit(true)
378 }
379 #[doc = r"Clears the field bit"]
380 #[inline(always)]
381 pub fn clear_bit(self) -> &'a mut W {
382 self.bit(false)
383 }
384 #[doc = r"Writes raw bits to the field"]
385 #[inline(always)]
386 pub fn bit(self, value: bool) -> &'a mut W {
387 self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
388 self.w
389 }
390}
391#[doc = "Reader of field `POL2`"]
392pub type POL2_R = crate::R<bool, bool>;
393#[doc = "Write proxy for field `POL2`"]
394pub struct POL2_W<'a> {
395 w: &'a mut W,
396}
397impl<'a> POL2_W<'a> {
398 #[doc = r"Sets the field bit"]
399 #[inline(always)]
400 pub fn set_bit(self) -> &'a mut W {
401 self.bit(true)
402 }
403 #[doc = r"Clears the field bit"]
404 #[inline(always)]
405 pub fn clear_bit(self) -> &'a mut W {
406 self.bit(false)
407 }
408 #[doc = r"Writes raw bits to the field"]
409 #[inline(always)]
410 pub fn bit(self, value: bool) -> &'a mut W {
411 self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
412 self.w
413 }
414}
415#[doc = "Reader of field `POL3`"]
416pub type POL3_R = crate::R<bool, bool>;
417#[doc = "Write proxy for field `POL3`"]
418pub struct POL3_W<'a> {
419 w: &'a mut W,
420}
421impl<'a> POL3_W<'a> {
422 #[doc = r"Sets the field bit"]
423 #[inline(always)]
424 pub fn set_bit(self) -> &'a mut W {
425 self.bit(true)
426 }
427 #[doc = r"Clears the field bit"]
428 #[inline(always)]
429 pub fn clear_bit(self) -> &'a mut W {
430 self.bit(false)
431 }
432 #[doc = r"Writes raw bits to the field"]
433 #[inline(always)]
434 pub fn bit(self, value: bool) -> &'a mut W {
435 self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
436 self.w
437 }
438}
439#[doc = "Reader of field `SWAP0`"]
440pub type SWAP0_R = crate::R<bool, bool>;
441#[doc = "Write proxy for field `SWAP0`"]
442pub struct SWAP0_W<'a> {
443 w: &'a mut W,
444}
445impl<'a> SWAP0_W<'a> {
446 #[doc = r"Sets the field bit"]
447 #[inline(always)]
448 pub fn set_bit(self) -> &'a mut W {
449 self.bit(true)
450 }
451 #[doc = r"Clears the field bit"]
452 #[inline(always)]
453 pub fn clear_bit(self) -> &'a mut W {
454 self.bit(false)
455 }
456 #[doc = r"Writes raw bits to the field"]
457 #[inline(always)]
458 pub fn bit(self, value: bool) -> &'a mut W {
459 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
460 self.w
461 }
462}
463#[doc = "Reader of field `SWAP1`"]
464pub type SWAP1_R = crate::R<bool, bool>;
465#[doc = "Write proxy for field `SWAP1`"]
466pub struct SWAP1_W<'a> {
467 w: &'a mut W,
468}
469impl<'a> SWAP1_W<'a> {
470 #[doc = r"Sets the field bit"]
471 #[inline(always)]
472 pub fn set_bit(self) -> &'a mut W {
473 self.bit(true)
474 }
475 #[doc = r"Clears the field bit"]
476 #[inline(always)]
477 pub fn clear_bit(self) -> &'a mut W {
478 self.bit(false)
479 }
480 #[doc = r"Writes raw bits to the field"]
481 #[inline(always)]
482 pub fn bit(self, value: bool) -> &'a mut W {
483 self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
484 self.w
485 }
486}
487#[doc = "Reader of field `SWAP2`"]
488pub type SWAP2_R = crate::R<bool, bool>;
489#[doc = "Write proxy for field `SWAP2`"]
490pub struct SWAP2_W<'a> {
491 w: &'a mut W,
492}
493impl<'a> SWAP2_W<'a> {
494 #[doc = r"Sets the field bit"]
495 #[inline(always)]
496 pub fn set_bit(self) -> &'a mut W {
497 self.bit(true)
498 }
499 #[doc = r"Clears the field bit"]
500 #[inline(always)]
501 pub fn clear_bit(self) -> &'a mut W {
502 self.bit(false)
503 }
504 #[doc = r"Writes raw bits to the field"]
505 #[inline(always)]
506 pub fn bit(self, value: bool) -> &'a mut W {
507 self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
508 self.w
509 }
510}
511#[doc = "Reader of field `SWAP3`"]
512pub type SWAP3_R = crate::R<bool, bool>;
513#[doc = "Write proxy for field `SWAP3`"]
514pub struct SWAP3_W<'a> {
515 w: &'a mut W,
516}
517impl<'a> SWAP3_W<'a> {
518 #[doc = r"Sets the field bit"]
519 #[inline(always)]
520 pub fn set_bit(self) -> &'a mut W {
521 self.bit(true)
522 }
523 #[doc = r"Clears the field bit"]
524 #[inline(always)]
525 pub fn clear_bit(self) -> &'a mut W {
526 self.bit(false)
527 }
528 #[doc = r"Writes raw bits to the field"]
529 #[inline(always)]
530 pub fn bit(self, value: bool) -> &'a mut W {
531 self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
532 self.w
533 }
534}
535impl R {
536 #[doc = "Bits 0:2 - Waveform Generation"]
537 #[inline(always)]
538 pub fn wavegen(&self) -> WAVEGEN_R {
539 WAVEGEN_R::new((self.bits & 0x07) as u8)
540 }
541 #[doc = "Bits 4:5 - Ramp Mode"]
542 #[inline(always)]
543 pub fn ramp(&self) -> RAMP_R {
544 RAMP_R::new(((self.bits >> 4) & 0x03) as u8)
545 }
546 #[doc = "Bit 7 - Circular period Enable"]
547 #[inline(always)]
548 pub fn ciperen(&self) -> CIPEREN_R {
549 CIPEREN_R::new(((self.bits >> 7) & 0x01) != 0)
550 }
551 #[doc = "Bit 8 - Circular Channel 0 Enable"]
552 #[inline(always)]
553 pub fn ciccen0(&self) -> CICCEN0_R {
554 CICCEN0_R::new(((self.bits >> 8) & 0x01) != 0)
555 }
556 #[doc = "Bit 9 - Circular Channel 1 Enable"]
557 #[inline(always)]
558 pub fn ciccen1(&self) -> CICCEN1_R {
559 CICCEN1_R::new(((self.bits >> 9) & 0x01) != 0)
560 }
561 #[doc = "Bit 10 - Circular Channel 2 Enable"]
562 #[inline(always)]
563 pub fn ciccen2(&self) -> CICCEN2_R {
564 CICCEN2_R::new(((self.bits >> 10) & 0x01) != 0)
565 }
566 #[doc = "Bit 11 - Circular Channel 3 Enable"]
567 #[inline(always)]
568 pub fn ciccen3(&self) -> CICCEN3_R {
569 CICCEN3_R::new(((self.bits >> 11) & 0x01) != 0)
570 }
571 #[doc = "Bit 16 - Channel 0 Polarity"]
572 #[inline(always)]
573 pub fn pol0(&self) -> POL0_R {
574 POL0_R::new(((self.bits >> 16) & 0x01) != 0)
575 }
576 #[doc = "Bit 17 - Channel 1 Polarity"]
577 #[inline(always)]
578 pub fn pol1(&self) -> POL1_R {
579 POL1_R::new(((self.bits >> 17) & 0x01) != 0)
580 }
581 #[doc = "Bit 18 - Channel 2 Polarity"]
582 #[inline(always)]
583 pub fn pol2(&self) -> POL2_R {
584 POL2_R::new(((self.bits >> 18) & 0x01) != 0)
585 }
586 #[doc = "Bit 19 - Channel 3 Polarity"]
587 #[inline(always)]
588 pub fn pol3(&self) -> POL3_R {
589 POL3_R::new(((self.bits >> 19) & 0x01) != 0)
590 }
591 #[doc = "Bit 24 - Swap DTI Output Pair 0"]
592 #[inline(always)]
593 pub fn swap0(&self) -> SWAP0_R {
594 SWAP0_R::new(((self.bits >> 24) & 0x01) != 0)
595 }
596 #[doc = "Bit 25 - Swap DTI Output Pair 1"]
597 #[inline(always)]
598 pub fn swap1(&self) -> SWAP1_R {
599 SWAP1_R::new(((self.bits >> 25) & 0x01) != 0)
600 }
601 #[doc = "Bit 26 - Swap DTI Output Pair 2"]
602 #[inline(always)]
603 pub fn swap2(&self) -> SWAP2_R {
604 SWAP2_R::new(((self.bits >> 26) & 0x01) != 0)
605 }
606 #[doc = "Bit 27 - Swap DTI Output Pair 3"]
607 #[inline(always)]
608 pub fn swap3(&self) -> SWAP3_R {
609 SWAP3_R::new(((self.bits >> 27) & 0x01) != 0)
610 }
611}
612impl W {
613 #[doc = "Bits 0:2 - Waveform Generation"]
614 #[inline(always)]
615 pub fn wavegen(&mut self) -> WAVEGEN_W {
616 WAVEGEN_W { w: self }
617 }
618 #[doc = "Bits 4:5 - Ramp Mode"]
619 #[inline(always)]
620 pub fn ramp(&mut self) -> RAMP_W {
621 RAMP_W { w: self }
622 }
623 #[doc = "Bit 7 - Circular period Enable"]
624 #[inline(always)]
625 pub fn ciperen(&mut self) -> CIPEREN_W {
626 CIPEREN_W { w: self }
627 }
628 #[doc = "Bit 8 - Circular Channel 0 Enable"]
629 #[inline(always)]
630 pub fn ciccen0(&mut self) -> CICCEN0_W {
631 CICCEN0_W { w: self }
632 }
633 #[doc = "Bit 9 - Circular Channel 1 Enable"]
634 #[inline(always)]
635 pub fn ciccen1(&mut self) -> CICCEN1_W {
636 CICCEN1_W { w: self }
637 }
638 #[doc = "Bit 10 - Circular Channel 2 Enable"]
639 #[inline(always)]
640 pub fn ciccen2(&mut self) -> CICCEN2_W {
641 CICCEN2_W { w: self }
642 }
643 #[doc = "Bit 11 - Circular Channel 3 Enable"]
644 #[inline(always)]
645 pub fn ciccen3(&mut self) -> CICCEN3_W {
646 CICCEN3_W { w: self }
647 }
648 #[doc = "Bit 16 - Channel 0 Polarity"]
649 #[inline(always)]
650 pub fn pol0(&mut self) -> POL0_W {
651 POL0_W { w: self }
652 }
653 #[doc = "Bit 17 - Channel 1 Polarity"]
654 #[inline(always)]
655 pub fn pol1(&mut self) -> POL1_W {
656 POL1_W { w: self }
657 }
658 #[doc = "Bit 18 - Channel 2 Polarity"]
659 #[inline(always)]
660 pub fn pol2(&mut self) -> POL2_W {
661 POL2_W { w: self }
662 }
663 #[doc = "Bit 19 - Channel 3 Polarity"]
664 #[inline(always)]
665 pub fn pol3(&mut self) -> POL3_W {
666 POL3_W { w: self }
667 }
668 #[doc = "Bit 24 - Swap DTI Output Pair 0"]
669 #[inline(always)]
670 pub fn swap0(&mut self) -> SWAP0_W {
671 SWAP0_W { w: self }
672 }
673 #[doc = "Bit 25 - Swap DTI Output Pair 1"]
674 #[inline(always)]
675 pub fn swap1(&mut self) -> SWAP1_W {
676 SWAP1_W { w: self }
677 }
678 #[doc = "Bit 26 - Swap DTI Output Pair 2"]
679 #[inline(always)]
680 pub fn swap2(&mut self) -> SWAP2_W {
681 SWAP2_W { w: self }
682 }
683 #[doc = "Bit 27 - Swap DTI Output Pair 3"]
684 #[inline(always)]
685 pub fn swap3(&mut self) -> SWAP3_W {
686 SWAP3_W { w: self }
687 }
688}