atsamd21e18a/tc3/count16/
ctrla.rs

1#[doc = "Reader of register CTRLA"]
2pub type R = crate::R<u16, super::CTRLA>;
3#[doc = "Writer for register CTRLA"]
4pub type W = crate::W<u16, super::CTRLA>;
5#[doc = "Register CTRLA `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTRLA {
7    type Type = u16;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Write proxy for field `SWRST`"]
14pub struct SWRST_W<'a> {
15    w: &'a mut W,
16}
17impl<'a> SWRST_W<'a> {
18    #[doc = r"Sets the field bit"]
19    #[inline(always)]
20    pub fn set_bit(self) -> &'a mut W {
21        self.bit(true)
22    }
23    #[doc = r"Clears the field bit"]
24    #[inline(always)]
25    pub fn clear_bit(self) -> &'a mut W {
26        self.bit(false)
27    }
28    #[doc = r"Writes raw bits to the field"]
29    #[inline(always)]
30    pub fn bit(self, value: bool) -> &'a mut W {
31        self.w.bits = (self.w.bits & !0x01) | ((value as u16) & 0x01);
32        self.w
33    }
34}
35#[doc = "Reader of field `ENABLE`"]
36pub type ENABLE_R = crate::R<bool, bool>;
37#[doc = "Write proxy for field `ENABLE`"]
38pub struct ENABLE_W<'a> {
39    w: &'a mut W,
40}
41impl<'a> ENABLE_W<'a> {
42    #[doc = r"Sets the field bit"]
43    #[inline(always)]
44    pub fn set_bit(self) -> &'a mut W {
45        self.bit(true)
46    }
47    #[doc = r"Clears the field bit"]
48    #[inline(always)]
49    pub fn clear_bit(self) -> &'a mut W {
50        self.bit(false)
51    }
52    #[doc = r"Writes raw bits to the field"]
53    #[inline(always)]
54    pub fn bit(self, value: bool) -> &'a mut W {
55        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u16) & 0x01) << 1);
56        self.w
57    }
58}
59#[doc = "TC Mode\n\nValue on reset: 0"]
60#[derive(Clone, Copy, Debug, PartialEq)]
61#[repr(u8)]
62pub enum MODE_A {
63    #[doc = "0: Counter in 16-bit mode"]
64    COUNT16 = 0,
65    #[doc = "1: Counter in 8-bit mode"]
66    COUNT8 = 1,
67    #[doc = "2: Counter in 32-bit mode"]
68    COUNT32 = 2,
69}
70impl From<MODE_A> for u8 {
71    #[inline(always)]
72    fn from(variant: MODE_A) -> Self {
73        variant as _
74    }
75}
76#[doc = "Reader of field `MODE`"]
77pub type MODE_R = crate::R<u8, MODE_A>;
78impl MODE_R {
79    #[doc = r"Get enumerated values variant"]
80    #[inline(always)]
81    pub fn variant(&self) -> crate::Variant<u8, MODE_A> {
82        use crate::Variant::*;
83        match self.bits {
84            0 => Val(MODE_A::COUNT16),
85            1 => Val(MODE_A::COUNT8),
86            2 => Val(MODE_A::COUNT32),
87            i => Res(i),
88        }
89    }
90    #[doc = "Checks if the value of the field is `COUNT16`"]
91    #[inline(always)]
92    pub fn is_count16(&self) -> bool {
93        *self == MODE_A::COUNT16
94    }
95    #[doc = "Checks if the value of the field is `COUNT8`"]
96    #[inline(always)]
97    pub fn is_count8(&self) -> bool {
98        *self == MODE_A::COUNT8
99    }
100    #[doc = "Checks if the value of the field is `COUNT32`"]
101    #[inline(always)]
102    pub fn is_count32(&self) -> bool {
103        *self == MODE_A::COUNT32
104    }
105}
106#[doc = "Write proxy for field `MODE`"]
107pub struct MODE_W<'a> {
108    w: &'a mut W,
109}
110impl<'a> MODE_W<'a> {
111    #[doc = r"Writes `variant` to the field"]
112    #[inline(always)]
113    pub fn variant(self, variant: MODE_A) -> &'a mut W {
114        unsafe { self.bits(variant.into()) }
115    }
116    #[doc = "Counter in 16-bit mode"]
117    #[inline(always)]
118    pub fn count16(self) -> &'a mut W {
119        self.variant(MODE_A::COUNT16)
120    }
121    #[doc = "Counter in 8-bit mode"]
122    #[inline(always)]
123    pub fn count8(self) -> &'a mut W {
124        self.variant(MODE_A::COUNT8)
125    }
126    #[doc = "Counter in 32-bit mode"]
127    #[inline(always)]
128    pub fn count32(self) -> &'a mut W {
129        self.variant(MODE_A::COUNT32)
130    }
131    #[doc = r"Writes raw bits to the field"]
132    #[inline(always)]
133    pub unsafe fn bits(self, value: u8) -> &'a mut W {
134        self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u16) & 0x03) << 2);
135        self.w
136    }
137}
138#[doc = "Waveform Generation Operation\n\nValue on reset: 0"]
139#[derive(Clone, Copy, Debug, PartialEq)]
140#[repr(u8)]
141pub enum WAVEGEN_A {
142    #[doc = "0: `0`"]
143    NFRQ = 0,
144    #[doc = "1: `1`"]
145    MFRQ = 1,
146    #[doc = "2: `10`"]
147    NPWM = 2,
148    #[doc = "3: `11`"]
149    MPWM = 3,
150}
151impl From<WAVEGEN_A> for u8 {
152    #[inline(always)]
153    fn from(variant: WAVEGEN_A) -> Self {
154        variant as _
155    }
156}
157#[doc = "Reader of field `WAVEGEN`"]
158pub type WAVEGEN_R = crate::R<u8, WAVEGEN_A>;
159impl WAVEGEN_R {
160    #[doc = r"Get enumerated values variant"]
161    #[inline(always)]
162    pub fn variant(&self) -> WAVEGEN_A {
163        match self.bits {
164            0 => WAVEGEN_A::NFRQ,
165            1 => WAVEGEN_A::MFRQ,
166            2 => WAVEGEN_A::NPWM,
167            3 => WAVEGEN_A::MPWM,
168            _ => unreachable!(),
169        }
170    }
171    #[doc = "Checks if the value of the field is `NFRQ`"]
172    #[inline(always)]
173    pub fn is_nfrq(&self) -> bool {
174        *self == WAVEGEN_A::NFRQ
175    }
176    #[doc = "Checks if the value of the field is `MFRQ`"]
177    #[inline(always)]
178    pub fn is_mfrq(&self) -> bool {
179        *self == WAVEGEN_A::MFRQ
180    }
181    #[doc = "Checks if the value of the field is `NPWM`"]
182    #[inline(always)]
183    pub fn is_npwm(&self) -> bool {
184        *self == WAVEGEN_A::NPWM
185    }
186    #[doc = "Checks if the value of the field is `MPWM`"]
187    #[inline(always)]
188    pub fn is_mpwm(&self) -> bool {
189        *self == WAVEGEN_A::MPWM
190    }
191}
192#[doc = "Write proxy for field `WAVEGEN`"]
193pub struct WAVEGEN_W<'a> {
194    w: &'a mut W,
195}
196impl<'a> WAVEGEN_W<'a> {
197    #[doc = r"Writes `variant` to the field"]
198    #[inline(always)]
199    pub fn variant(self, variant: WAVEGEN_A) -> &'a mut W {
200        {
201            self.bits(variant.into())
202        }
203    }
204    #[doc = "`0`"]
205    #[inline(always)]
206    pub fn nfrq(self) -> &'a mut W {
207        self.variant(WAVEGEN_A::NFRQ)
208    }
209    #[doc = "`1`"]
210    #[inline(always)]
211    pub fn mfrq(self) -> &'a mut W {
212        self.variant(WAVEGEN_A::MFRQ)
213    }
214    #[doc = "`10`"]
215    #[inline(always)]
216    pub fn npwm(self) -> &'a mut W {
217        self.variant(WAVEGEN_A::NPWM)
218    }
219    #[doc = "`11`"]
220    #[inline(always)]
221    pub fn mpwm(self) -> &'a mut W {
222        self.variant(WAVEGEN_A::MPWM)
223    }
224    #[doc = r"Writes raw bits to the field"]
225    #[inline(always)]
226    pub fn bits(self, value: u8) -> &'a mut W {
227        self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u16) & 0x03) << 5);
228        self.w
229    }
230}
231#[doc = "Prescaler\n\nValue on reset: 0"]
232#[derive(Clone, Copy, Debug, PartialEq)]
233#[repr(u8)]
234pub enum PRESCALER_A {
235    #[doc = "0: Prescaler: GCLK_TC"]
236    DIV1 = 0,
237    #[doc = "1: Prescaler: GCLK_TC/2"]
238    DIV2 = 1,
239    #[doc = "2: Prescaler: GCLK_TC/4"]
240    DIV4 = 2,
241    #[doc = "3: Prescaler: GCLK_TC/8"]
242    DIV8 = 3,
243    #[doc = "4: Prescaler: GCLK_TC/16"]
244    DIV16 = 4,
245    #[doc = "5: Prescaler: GCLK_TC/64"]
246    DIV64 = 5,
247    #[doc = "6: Prescaler: GCLK_TC/256"]
248    DIV256 = 6,
249    #[doc = "7: Prescaler: GCLK_TC/1024"]
250    DIV1024 = 7,
251}
252impl From<PRESCALER_A> for u8 {
253    #[inline(always)]
254    fn from(variant: PRESCALER_A) -> Self {
255        variant as _
256    }
257}
258#[doc = "Reader of field `PRESCALER`"]
259pub type PRESCALER_R = crate::R<u8, PRESCALER_A>;
260impl PRESCALER_R {
261    #[doc = r"Get enumerated values variant"]
262    #[inline(always)]
263    pub fn variant(&self) -> PRESCALER_A {
264        match self.bits {
265            0 => PRESCALER_A::DIV1,
266            1 => PRESCALER_A::DIV2,
267            2 => PRESCALER_A::DIV4,
268            3 => PRESCALER_A::DIV8,
269            4 => PRESCALER_A::DIV16,
270            5 => PRESCALER_A::DIV64,
271            6 => PRESCALER_A::DIV256,
272            7 => PRESCALER_A::DIV1024,
273            _ => unreachable!(),
274        }
275    }
276    #[doc = "Checks if the value of the field is `DIV1`"]
277    #[inline(always)]
278    pub fn is_div1(&self) -> bool {
279        *self == PRESCALER_A::DIV1
280    }
281    #[doc = "Checks if the value of the field is `DIV2`"]
282    #[inline(always)]
283    pub fn is_div2(&self) -> bool {
284        *self == PRESCALER_A::DIV2
285    }
286    #[doc = "Checks if the value of the field is `DIV4`"]
287    #[inline(always)]
288    pub fn is_div4(&self) -> bool {
289        *self == PRESCALER_A::DIV4
290    }
291    #[doc = "Checks if the value of the field is `DIV8`"]
292    #[inline(always)]
293    pub fn is_div8(&self) -> bool {
294        *self == PRESCALER_A::DIV8
295    }
296    #[doc = "Checks if the value of the field is `DIV16`"]
297    #[inline(always)]
298    pub fn is_div16(&self) -> bool {
299        *self == PRESCALER_A::DIV16
300    }
301    #[doc = "Checks if the value of the field is `DIV64`"]
302    #[inline(always)]
303    pub fn is_div64(&self) -> bool {
304        *self == PRESCALER_A::DIV64
305    }
306    #[doc = "Checks if the value of the field is `DIV256`"]
307    #[inline(always)]
308    pub fn is_div256(&self) -> bool {
309        *self == PRESCALER_A::DIV256
310    }
311    #[doc = "Checks if the value of the field is `DIV1024`"]
312    #[inline(always)]
313    pub fn is_div1024(&self) -> bool {
314        *self == PRESCALER_A::DIV1024
315    }
316}
317#[doc = "Write proxy for field `PRESCALER`"]
318pub struct PRESCALER_W<'a> {
319    w: &'a mut W,
320}
321impl<'a> PRESCALER_W<'a> {
322    #[doc = r"Writes `variant` to the field"]
323    #[inline(always)]
324    pub fn variant(self, variant: PRESCALER_A) -> &'a mut W {
325        {
326            self.bits(variant.into())
327        }
328    }
329    #[doc = "Prescaler: GCLK_TC"]
330    #[inline(always)]
331    pub fn div1(self) -> &'a mut W {
332        self.variant(PRESCALER_A::DIV1)
333    }
334    #[doc = "Prescaler: GCLK_TC/2"]
335    #[inline(always)]
336    pub fn div2(self) -> &'a mut W {
337        self.variant(PRESCALER_A::DIV2)
338    }
339    #[doc = "Prescaler: GCLK_TC/4"]
340    #[inline(always)]
341    pub fn div4(self) -> &'a mut W {
342        self.variant(PRESCALER_A::DIV4)
343    }
344    #[doc = "Prescaler: GCLK_TC/8"]
345    #[inline(always)]
346    pub fn div8(self) -> &'a mut W {
347        self.variant(PRESCALER_A::DIV8)
348    }
349    #[doc = "Prescaler: GCLK_TC/16"]
350    #[inline(always)]
351    pub fn div16(self) -> &'a mut W {
352        self.variant(PRESCALER_A::DIV16)
353    }
354    #[doc = "Prescaler: GCLK_TC/64"]
355    #[inline(always)]
356    pub fn div64(self) -> &'a mut W {
357        self.variant(PRESCALER_A::DIV64)
358    }
359    #[doc = "Prescaler: GCLK_TC/256"]
360    #[inline(always)]
361    pub fn div256(self) -> &'a mut W {
362        self.variant(PRESCALER_A::DIV256)
363    }
364    #[doc = "Prescaler: GCLK_TC/1024"]
365    #[inline(always)]
366    pub fn div1024(self) -> &'a mut W {
367        self.variant(PRESCALER_A::DIV1024)
368    }
369    #[doc = r"Writes raw bits to the field"]
370    #[inline(always)]
371    pub fn bits(self, value: u8) -> &'a mut W {
372        self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u16) & 0x07) << 8);
373        self.w
374    }
375}
376#[doc = "Reader of field `RUNSTDBY`"]
377pub type RUNSTDBY_R = crate::R<bool, bool>;
378#[doc = "Write proxy for field `RUNSTDBY`"]
379pub struct RUNSTDBY_W<'a> {
380    w: &'a mut W,
381}
382impl<'a> RUNSTDBY_W<'a> {
383    #[doc = r"Sets the field bit"]
384    #[inline(always)]
385    pub fn set_bit(self) -> &'a mut W {
386        self.bit(true)
387    }
388    #[doc = r"Clears the field bit"]
389    #[inline(always)]
390    pub fn clear_bit(self) -> &'a mut W {
391        self.bit(false)
392    }
393    #[doc = r"Writes raw bits to the field"]
394    #[inline(always)]
395    pub fn bit(self, value: bool) -> &'a mut W {
396        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u16) & 0x01) << 11);
397        self.w
398    }
399}
400#[doc = "Prescaler and Counter Synchronization\n\nValue on reset: 0"]
401#[derive(Clone, Copy, Debug, PartialEq)]
402#[repr(u8)]
403pub enum PRESCSYNC_A {
404    #[doc = "0: Reload or reset the counter on next generic clock"]
405    GCLK = 0,
406    #[doc = "1: Reload or reset the counter on next prescaler clock"]
407    PRESC = 1,
408    #[doc = "2: Reload or reset the counter on next generic clock. Reset the prescaler counter"]
409    RESYNC = 2,
410}
411impl From<PRESCSYNC_A> for u8 {
412    #[inline(always)]
413    fn from(variant: PRESCSYNC_A) -> Self {
414        variant as _
415    }
416}
417#[doc = "Reader of field `PRESCSYNC`"]
418pub type PRESCSYNC_R = crate::R<u8, PRESCSYNC_A>;
419impl PRESCSYNC_R {
420    #[doc = r"Get enumerated values variant"]
421    #[inline(always)]
422    pub fn variant(&self) -> crate::Variant<u8, PRESCSYNC_A> {
423        use crate::Variant::*;
424        match self.bits {
425            0 => Val(PRESCSYNC_A::GCLK),
426            1 => Val(PRESCSYNC_A::PRESC),
427            2 => Val(PRESCSYNC_A::RESYNC),
428            i => Res(i),
429        }
430    }
431    #[doc = "Checks if the value of the field is `GCLK`"]
432    #[inline(always)]
433    pub fn is_gclk(&self) -> bool {
434        *self == PRESCSYNC_A::GCLK
435    }
436    #[doc = "Checks if the value of the field is `PRESC`"]
437    #[inline(always)]
438    pub fn is_presc(&self) -> bool {
439        *self == PRESCSYNC_A::PRESC
440    }
441    #[doc = "Checks if the value of the field is `RESYNC`"]
442    #[inline(always)]
443    pub fn is_resync(&self) -> bool {
444        *self == PRESCSYNC_A::RESYNC
445    }
446}
447#[doc = "Write proxy for field `PRESCSYNC`"]
448pub struct PRESCSYNC_W<'a> {
449    w: &'a mut W,
450}
451impl<'a> PRESCSYNC_W<'a> {
452    #[doc = r"Writes `variant` to the field"]
453    #[inline(always)]
454    pub fn variant(self, variant: PRESCSYNC_A) -> &'a mut W {
455        unsafe { self.bits(variant.into()) }
456    }
457    #[doc = "Reload or reset the counter on next generic clock"]
458    #[inline(always)]
459    pub fn gclk(self) -> &'a mut W {
460        self.variant(PRESCSYNC_A::GCLK)
461    }
462    #[doc = "Reload or reset the counter on next prescaler clock"]
463    #[inline(always)]
464    pub fn presc(self) -> &'a mut W {
465        self.variant(PRESCSYNC_A::PRESC)
466    }
467    #[doc = "Reload or reset the counter on next generic clock. Reset the prescaler counter"]
468    #[inline(always)]
469    pub fn resync(self) -> &'a mut W {
470        self.variant(PRESCSYNC_A::RESYNC)
471    }
472    #[doc = r"Writes raw bits to the field"]
473    #[inline(always)]
474    pub unsafe fn bits(self, value: u8) -> &'a mut W {
475        self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u16) & 0x03) << 12);
476        self.w
477    }
478}
479impl R {
480    #[doc = "Bit 1 - Enable"]
481    #[inline(always)]
482    pub fn enable(&self) -> ENABLE_R {
483        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
484    }
485    #[doc = "Bits 2:3 - TC Mode"]
486    #[inline(always)]
487    pub fn mode(&self) -> MODE_R {
488        MODE_R::new(((self.bits >> 2) & 0x03) as u8)
489    }
490    #[doc = "Bits 5:6 - Waveform Generation Operation"]
491    #[inline(always)]
492    pub fn wavegen(&self) -> WAVEGEN_R {
493        WAVEGEN_R::new(((self.bits >> 5) & 0x03) as u8)
494    }
495    #[doc = "Bits 8:10 - Prescaler"]
496    #[inline(always)]
497    pub fn prescaler(&self) -> PRESCALER_R {
498        PRESCALER_R::new(((self.bits >> 8) & 0x07) as u8)
499    }
500    #[doc = "Bit 11 - Run in Standby"]
501    #[inline(always)]
502    pub fn runstdby(&self) -> RUNSTDBY_R {
503        RUNSTDBY_R::new(((self.bits >> 11) & 0x01) != 0)
504    }
505    #[doc = "Bits 12:13 - Prescaler and Counter Synchronization"]
506    #[inline(always)]
507    pub fn prescsync(&self) -> PRESCSYNC_R {
508        PRESCSYNC_R::new(((self.bits >> 12) & 0x03) as u8)
509    }
510}
511impl W {
512    #[doc = "Bit 0 - Software Reset"]
513    #[inline(always)]
514    pub fn swrst(&mut self) -> SWRST_W {
515        SWRST_W { w: self }
516    }
517    #[doc = "Bit 1 - Enable"]
518    #[inline(always)]
519    pub fn enable(&mut self) -> ENABLE_W {
520        ENABLE_W { w: self }
521    }
522    #[doc = "Bits 2:3 - TC Mode"]
523    #[inline(always)]
524    pub fn mode(&mut self) -> MODE_W {
525        MODE_W { w: self }
526    }
527    #[doc = "Bits 5:6 - Waveform Generation Operation"]
528    #[inline(always)]
529    pub fn wavegen(&mut self) -> WAVEGEN_W {
530        WAVEGEN_W { w: self }
531    }
532    #[doc = "Bits 8:10 - Prescaler"]
533    #[inline(always)]
534    pub fn prescaler(&mut self) -> PRESCALER_W {
535        PRESCALER_W { w: self }
536    }
537    #[doc = "Bit 11 - Run in Standby"]
538    #[inline(always)]
539    pub fn runstdby(&mut self) -> RUNSTDBY_W {
540        RUNSTDBY_W { w: self }
541    }
542    #[doc = "Bits 12:13 - Prescaler and Counter Synchronization"]
543    #[inline(always)]
544    pub fn prescsync(&mut self) -> PRESCSYNC_W {
545        PRESCSYNC_W { w: self }
546    }
547}
atsamd21e18a/tc3/count16/ctrla.rs

atsamd21e18a/tc3/count16/
ctrla.rs
