atsam4sp32a_pac/adc/
cher.rs1#[doc = "Register `CHER` writer"]
2pub struct W(crate::W<CHER_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<CHER_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<CHER_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<CHER_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `CH0` writer - Channel 0 Enable"]
23pub type CH0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
24#[doc = "Field `CH1` writer - Channel 1 Enable"]
25pub type CH1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
26#[doc = "Field `CH2` writer - Channel 2 Enable"]
27pub type CH2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
28#[doc = "Field `CH3` writer - Channel 3 Enable"]
29pub type CH3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
30#[doc = "Field `CH4` writer - Channel 4 Enable"]
31pub type CH4_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
32#[doc = "Field `CH5` writer - Channel 5 Enable"]
33pub type CH5_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
34#[doc = "Field `CH6` writer - Channel 6 Enable"]
35pub type CH6_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
36#[doc = "Field `CH7` writer - Channel 7 Enable"]
37pub type CH7_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
38#[doc = "Field `CH8` writer - Channel 8 Enable"]
39pub type CH8_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
40#[doc = "Field `CH9` writer - Channel 9 Enable"]
41pub type CH9_W<'a, const O: u8> = crate::BitWriter<'a, u32, CHER_SPEC, bool, O>;
42impl W {
43 #[doc = "Bit 0 - Channel 0 Enable"]
44 #[inline(always)]
45 #[must_use]
46 pub fn ch0(&mut self) -> CH0_W<0> {
47 CH0_W::new(self)
48 }
49 #[doc = "Bit 1 - Channel 1 Enable"]
50 #[inline(always)]
51 #[must_use]
52 pub fn ch1(&mut self) -> CH1_W<1> {
53 CH1_W::new(self)
54 }
55 #[doc = "Bit 2 - Channel 2 Enable"]
56 #[inline(always)]
57 #[must_use]
58 pub fn ch2(&mut self) -> CH2_W<2> {
59 CH2_W::new(self)
60 }
61 #[doc = "Bit 3 - Channel 3 Enable"]
62 #[inline(always)]
63 #[must_use]
64 pub fn ch3(&mut self) -> CH3_W<3> {
65 CH3_W::new(self)
66 }
67 #[doc = "Bit 4 - Channel 4 Enable"]
68 #[inline(always)]
69 #[must_use]
70 pub fn ch4(&mut self) -> CH4_W<4> {
71 CH4_W::new(self)
72 }
73 #[doc = "Bit 5 - Channel 5 Enable"]
74 #[inline(always)]
75 #[must_use]
76 pub fn ch5(&mut self) -> CH5_W<5> {
77 CH5_W::new(self)
78 }
79 #[doc = "Bit 6 - Channel 6 Enable"]
80 #[inline(always)]
81 #[must_use]
82 pub fn ch6(&mut self) -> CH6_W<6> {
83 CH6_W::new(self)
84 }
85 #[doc = "Bit 7 - Channel 7 Enable"]
86 #[inline(always)]
87 #[must_use]
88 pub fn ch7(&mut self) -> CH7_W<7> {
89 CH7_W::new(self)
90 }
91 #[doc = "Bit 8 - Channel 8 Enable"]
92 #[inline(always)]
93 #[must_use]
94 pub fn ch8(&mut self) -> CH8_W<8> {
95 CH8_W::new(self)
96 }
97 #[doc = "Bit 9 - Channel 9 Enable"]
98 #[inline(always)]
99 #[must_use]
100 pub fn ch9(&mut self) -> CH9_W<9> {
101 CH9_W::new(self)
102 }
103 #[doc = "Writes raw bits to the register."]
104 #[inline(always)]
105 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
106 self.0.bits(bits);
107 self
108 }
109}
110#[doc = "Channel Enable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cher](index.html) module"]
111pub struct CHER_SPEC;
112impl crate::RegisterSpec for CHER_SPEC {
113 type Ux = u32;
114}
115#[doc = "`write(|w| ..)` method takes [cher::W](W) writer structure"]
116impl crate::Writable for CHER_SPEC {
117 type Writer = W;
118 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
119 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120}