atsam4sd32c_pac/efc1/
fsr.rs

1#[doc = "Register `FSR` reader"]
2pub struct R(crate::R<FSR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FSR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FSR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FSR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `FRDY` reader - Flash Ready Status"]
17pub type FRDY_R = crate::BitReader<bool>;
18#[doc = "Field `FCMDE` reader - Flash Command Error Status"]
19pub type FCMDE_R = crate::BitReader<bool>;
20#[doc = "Field `FLOCKE` reader - Flash Lock Error Status"]
21pub type FLOCKE_R = crate::BitReader<bool>;
22#[doc = "Field `FLERR` reader - Flash Error Status"]
23pub type FLERR_R = crate::BitReader<bool>;
24impl R {
25    #[doc = "Bit 0 - Flash Ready Status"]
26    #[inline(always)]
27    pub fn frdy(&self) -> FRDY_R {
28        FRDY_R::new((self.bits & 1) != 0)
29    }
30    #[doc = "Bit 1 - Flash Command Error Status"]
31    #[inline(always)]
32    pub fn fcmde(&self) -> FCMDE_R {
33        FCMDE_R::new(((self.bits >> 1) & 1) != 0)
34    }
35    #[doc = "Bit 2 - Flash Lock Error Status"]
36    #[inline(always)]
37    pub fn flocke(&self) -> FLOCKE_R {
38        FLOCKE_R::new(((self.bits >> 2) & 1) != 0)
39    }
40    #[doc = "Bit 3 - Flash Error Status"]
41    #[inline(always)]
42    pub fn flerr(&self) -> FLERR_R {
43        FLERR_R::new(((self.bits >> 3) & 1) != 0)
44    }
45}
46#[doc = "EEFC Flash Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fsr](index.html) module"]
47pub struct FSR_SPEC;
48impl crate::RegisterSpec for FSR_SPEC {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [fsr::R](R) reader structure"]
52impl crate::Readable for FSR_SPEC {
53    type Reader = R;
54}
55#[doc = "`reset()` method sets FSR to value 0x01"]
56impl crate::Resettable for FSR_SPEC {
57    const RESET_VALUE: Self::Ux = 0x01;
58}
atsam4sd32c_pac/efc1/fsr.rs

atsam4sd32c_pac/efc1/
fsr.rs
