atsam4sd32c_pac/pioc/
pcisr.rs

1#[doc = "Register `PCISR` reader"]
2pub struct R(crate::R<PCISR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PCISR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PCISR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PCISR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `DRDY` reader - Parallel Capture Mode Data Ready"]
17pub type DRDY_R = crate::BitReader<bool>;
18#[doc = "Field `OVRE` reader - Parallel Capture Mode Overrun Error."]
19pub type OVRE_R = crate::BitReader<bool>;
20#[doc = "Field `ENDRX` reader - End of Reception Transfer."]
21pub type ENDRX_R = crate::BitReader<bool>;
22#[doc = "Field `RXBUFF` reader - Reception Buffer Full"]
23pub type RXBUFF_R = crate::BitReader<bool>;
24impl R {
25    #[doc = "Bit 0 - Parallel Capture Mode Data Ready"]
26    #[inline(always)]
27    pub fn drdy(&self) -> DRDY_R {
28        DRDY_R::new((self.bits & 1) != 0)
29    }
30    #[doc = "Bit 1 - Parallel Capture Mode Overrun Error."]
31    #[inline(always)]
32    pub fn ovre(&self) -> OVRE_R {
33        OVRE_R::new(((self.bits >> 1) & 1) != 0)
34    }
35    #[doc = "Bit 2 - End of Reception Transfer."]
36    #[inline(always)]
37    pub fn endrx(&self) -> ENDRX_R {
38        ENDRX_R::new(((self.bits >> 2) & 1) != 0)
39    }
40    #[doc = "Bit 3 - Reception Buffer Full"]
41    #[inline(always)]
42    pub fn rxbuff(&self) -> RXBUFF_R {
43        RXBUFF_R::new(((self.bits >> 3) & 1) != 0)
44    }
45}
46#[doc = "Parallel Capture Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcisr](index.html) module"]
47pub struct PCISR_SPEC;
48impl crate::RegisterSpec for PCISR_SPEC {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [pcisr::R](R) reader structure"]
52impl crate::Readable for PCISR_SPEC {
53    type Reader = R;
54}
55#[doc = "`reset()` method sets PCISR to value 0"]
56impl crate::Resettable for PCISR_SPEC {
57    const RESET_VALUE: Self::Ux = 0;
58}
atsam4sd32c_pac/pioc/pcisr.rs

atsam4sd32c_pac/pioc/
pcisr.rs
