atsam4sd32b_pac/usart0/
spi_mode_csr_spi_mode.rs

1#[doc = "Register `CSR_SPI_MODE` reader"]
2pub struct R(crate::R<SPI_MODE_CSR_SPI_MODE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SPI_MODE_CSR_SPI_MODE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SPI_MODE_CSR_SPI_MODE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SPI_MODE_CSR_SPI_MODE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `RXRDY` reader - Receiver Ready"]
17pub type RXRDY_R = crate::BitReader<bool>;
18#[doc = "Field `TXRDY` reader - Transmitter Ready"]
19pub type TXRDY_R = crate::BitReader<bool>;
20#[doc = "Field `ENDRX` reader - "]
21pub type ENDRX_R = crate::BitReader<bool>;
22#[doc = "Field `ENDTX` reader - "]
23pub type ENDTX_R = crate::BitReader<bool>;
24#[doc = "Field `OVRE` reader - Overrun Error"]
25pub type OVRE_R = crate::BitReader<bool>;
26#[doc = "Field `TXEMPTY` reader - Transmitter Empty"]
27pub type TXEMPTY_R = crate::BitReader<bool>;
28#[doc = "Field `UNRE` reader - Underrun Error"]
29pub type UNRE_R = crate::BitReader<bool>;
30#[doc = "Field `TXBUFE` reader - "]
31pub type TXBUFE_R = crate::BitReader<bool>;
32#[doc = "Field `RXBUFF` reader - "]
33pub type RXBUFF_R = crate::BitReader<bool>;
34impl R {
35    #[doc = "Bit 0 - Receiver Ready"]
36    #[inline(always)]
37    pub fn rxrdy(&self) -> RXRDY_R {
38        RXRDY_R::new((self.bits & 1) != 0)
39    }
40    #[doc = "Bit 1 - Transmitter Ready"]
41    #[inline(always)]
42    pub fn txrdy(&self) -> TXRDY_R {
43        TXRDY_R::new(((self.bits >> 1) & 1) != 0)
44    }
45    #[doc = "Bit 3"]
46    #[inline(always)]
47    pub fn endrx(&self) -> ENDRX_R {
48        ENDRX_R::new(((self.bits >> 3) & 1) != 0)
49    }
50    #[doc = "Bit 4"]
51    #[inline(always)]
52    pub fn endtx(&self) -> ENDTX_R {
53        ENDTX_R::new(((self.bits >> 4) & 1) != 0)
54    }
55    #[doc = "Bit 5 - Overrun Error"]
56    #[inline(always)]
57    pub fn ovre(&self) -> OVRE_R {
58        OVRE_R::new(((self.bits >> 5) & 1) != 0)
59    }
60    #[doc = "Bit 9 - Transmitter Empty"]
61    #[inline(always)]
62    pub fn txempty(&self) -> TXEMPTY_R {
63        TXEMPTY_R::new(((self.bits >> 9) & 1) != 0)
64    }
65    #[doc = "Bit 10 - Underrun Error"]
66    #[inline(always)]
67    pub fn unre(&self) -> UNRE_R {
68        UNRE_R::new(((self.bits >> 10) & 1) != 0)
69    }
70    #[doc = "Bit 11"]
71    #[inline(always)]
72    pub fn txbufe(&self) -> TXBUFE_R {
73        TXBUFE_R::new(((self.bits >> 11) & 1) != 0)
74    }
75    #[doc = "Bit 12"]
76    #[inline(always)]
77    pub fn rxbuff(&self) -> RXBUFF_R {
78        RXBUFF_R::new(((self.bits >> 12) & 1) != 0)
79    }
80}
81#[doc = "Channel Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_mode_csr_spi_mode](index.html) module"]
82pub struct SPI_MODE_CSR_SPI_MODE_SPEC;
83impl crate::RegisterSpec for SPI_MODE_CSR_SPI_MODE_SPEC {
84    type Ux = u32;
85}
86#[doc = "`read()` method returns [spi_mode_csr_spi_mode::R](R) reader structure"]
87impl crate::Readable for SPI_MODE_CSR_SPI_MODE_SPEC {
88    type Reader = R;
89}
atsam4sd32b_pac/usart0/spi_mode_csr_spi_mode.rs

atsam4sd32b_pac/usart0/
spi_mode_csr_spi_mode.rs
