atsam4sd32b_pac/supc/
smmr.rs

1#[doc = "Register `SMMR` reader"]
2pub struct R(crate::R<SMMR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SMMR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SMMR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SMMR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SMMR` writer"]
17pub struct W(crate::W<SMMR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SMMR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SMMR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SMMR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SMTH` reader - Supply Monitor Threshold"]
38pub type SMTH_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `SMTH` writer - Supply Monitor Threshold"]
40pub type SMTH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SMMR_SPEC, u8, u8, 4, O>;
41#[doc = "Field `SMSMPL` reader - Supply Monitor Sampling Period"]
42pub type SMSMPL_R = crate::FieldReader<u8, SMSMPL_A>;
43#[doc = "Supply Monitor Sampling Period\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum SMSMPL_A {
47    #[doc = "0: Supply Monitor disabled"]
48    SMD = 0,
49    #[doc = "1: Continuous Supply Monitor"]
50    CSM = 1,
51    #[doc = "2: Supply Monitor enabled one SLCK period every 32 SLCK periods"]
52    _32SLCK = 2,
53    #[doc = "3: Supply Monitor enabled one SLCK period every 256 SLCK periods"]
54    _256SLCK = 3,
55    #[doc = "4: Supply Monitor enabled one SLCK period every 2,048 SLCK periods"]
56    _2048SLCK = 4,
57}
58impl From<SMSMPL_A> for u8 {
59    #[inline(always)]
60    fn from(variant: SMSMPL_A) -> Self {
61        variant as _
62    }
63}
64impl SMSMPL_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<SMSMPL_A> {
68        match self.bits {
69            0 => Some(SMSMPL_A::SMD),
70            1 => Some(SMSMPL_A::CSM),
71            2 => Some(SMSMPL_A::_32SLCK),
72            3 => Some(SMSMPL_A::_256SLCK),
73            4 => Some(SMSMPL_A::_2048SLCK),
74            _ => None,
75        }
76    }
77    #[doc = "Checks if the value of the field is `SMD`"]
78    #[inline(always)]
79    pub fn is_smd(&self) -> bool {
80        *self == SMSMPL_A::SMD
81    }
82    #[doc = "Checks if the value of the field is `CSM`"]
83    #[inline(always)]
84    pub fn is_csm(&self) -> bool {
85        *self == SMSMPL_A::CSM
86    }
87    #[doc = "Checks if the value of the field is `_32SLCK`"]
88    #[inline(always)]
89    pub fn is_32slck(&self) -> bool {
90        *self == SMSMPL_A::_32SLCK
91    }
92    #[doc = "Checks if the value of the field is `_256SLCK`"]
93    #[inline(always)]
94    pub fn is_256slck(&self) -> bool {
95        *self == SMSMPL_A::_256SLCK
96    }
97    #[doc = "Checks if the value of the field is `_2048SLCK`"]
98    #[inline(always)]
99    pub fn is_2048slck(&self) -> bool {
100        *self == SMSMPL_A::_2048SLCK
101    }
102}
103#[doc = "Field `SMSMPL` writer - Supply Monitor Sampling Period"]
104pub type SMSMPL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SMMR_SPEC, u8, SMSMPL_A, 3, O>;
105impl<'a, const O: u8> SMSMPL_W<'a, O> {
106    #[doc = "Supply Monitor disabled"]
107    #[inline(always)]
108    pub fn smd(self) -> &'a mut W {
109        self.variant(SMSMPL_A::SMD)
110    }
111    #[doc = "Continuous Supply Monitor"]
112    #[inline(always)]
113    pub fn csm(self) -> &'a mut W {
114        self.variant(SMSMPL_A::CSM)
115    }
116    #[doc = "Supply Monitor enabled one SLCK period every 32 SLCK periods"]
117    #[inline(always)]
118    pub fn _32slck(self) -> &'a mut W {
119        self.variant(SMSMPL_A::_32SLCK)
120    }
121    #[doc = "Supply Monitor enabled one SLCK period every 256 SLCK periods"]
122    #[inline(always)]
123    pub fn _256slck(self) -> &'a mut W {
124        self.variant(SMSMPL_A::_256SLCK)
125    }
126    #[doc = "Supply Monitor enabled one SLCK period every 2,048 SLCK periods"]
127    #[inline(always)]
128    pub fn _2048slck(self) -> &'a mut W {
129        self.variant(SMSMPL_A::_2048SLCK)
130    }
131}
132#[doc = "Field `SMRSTEN` reader - Supply Monitor Reset Enable"]
133pub type SMRSTEN_R = crate::BitReader<SMRSTEN_A>;
134#[doc = "Supply Monitor Reset Enable\n\nValue on reset: 0"]
135#[derive(Clone, Copy, Debug, PartialEq, Eq)]
136pub enum SMRSTEN_A {
137    #[doc = "0: The core reset signal \"vddcore_nreset\" is not affected when a supply monitor detection occurs."]
138    NOT_ENABLE = 0,
139    #[doc = "1: The core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs."]
140    ENABLE = 1,
141}
142impl From<SMRSTEN_A> for bool {
143    #[inline(always)]
144    fn from(variant: SMRSTEN_A) -> Self {
145        variant as u8 != 0
146    }
147}
148impl SMRSTEN_R {
149    #[doc = "Get enumerated values variant"]
150    #[inline(always)]
151    pub fn variant(&self) -> SMRSTEN_A {
152        match self.bits {
153            false => SMRSTEN_A::NOT_ENABLE,
154            true => SMRSTEN_A::ENABLE,
155        }
156    }
157    #[doc = "Checks if the value of the field is `NOT_ENABLE`"]
158    #[inline(always)]
159    pub fn is_not_enable(&self) -> bool {
160        *self == SMRSTEN_A::NOT_ENABLE
161    }
162    #[doc = "Checks if the value of the field is `ENABLE`"]
163    #[inline(always)]
164    pub fn is_enable(&self) -> bool {
165        *self == SMRSTEN_A::ENABLE
166    }
167}
168#[doc = "Field `SMRSTEN` writer - Supply Monitor Reset Enable"]
169pub type SMRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SMMR_SPEC, SMRSTEN_A, O>;
170impl<'a, const O: u8> SMRSTEN_W<'a, O> {
171    #[doc = "The core reset signal \"vddcore_nreset\" is not affected when a supply monitor detection occurs."]
172    #[inline(always)]
173    pub fn not_enable(self) -> &'a mut W {
174        self.variant(SMRSTEN_A::NOT_ENABLE)
175    }
176    #[doc = "The core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs."]
177    #[inline(always)]
178    pub fn enable(self) -> &'a mut W {
179        self.variant(SMRSTEN_A::ENABLE)
180    }
181}
182#[doc = "Field `SMIEN` reader - Supply Monitor Interrupt Enable"]
183pub type SMIEN_R = crate::BitReader<SMIEN_A>;
184#[doc = "Supply Monitor Interrupt Enable\n\nValue on reset: 0"]
185#[derive(Clone, Copy, Debug, PartialEq, Eq)]
186pub enum SMIEN_A {
187    #[doc = "0: The SUPC interrupt signal is not affected when a supply monitor detection occurs."]
188    NOT_ENABLE = 0,
189    #[doc = "1: The SUPC interrupt signal is asserted when a supply monitor detection occurs."]
190    ENABLE = 1,
191}
192impl From<SMIEN_A> for bool {
193    #[inline(always)]
194    fn from(variant: SMIEN_A) -> Self {
195        variant as u8 != 0
196    }
197}
198impl SMIEN_R {
199    #[doc = "Get enumerated values variant"]
200    #[inline(always)]
201    pub fn variant(&self) -> SMIEN_A {
202        match self.bits {
203            false => SMIEN_A::NOT_ENABLE,
204            true => SMIEN_A::ENABLE,
205        }
206    }
207    #[doc = "Checks if the value of the field is `NOT_ENABLE`"]
208    #[inline(always)]
209    pub fn is_not_enable(&self) -> bool {
210        *self == SMIEN_A::NOT_ENABLE
211    }
212    #[doc = "Checks if the value of the field is `ENABLE`"]
213    #[inline(always)]
214    pub fn is_enable(&self) -> bool {
215        *self == SMIEN_A::ENABLE
216    }
217}
218#[doc = "Field `SMIEN` writer - Supply Monitor Interrupt Enable"]
219pub type SMIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SMMR_SPEC, SMIEN_A, O>;
220impl<'a, const O: u8> SMIEN_W<'a, O> {
221    #[doc = "The SUPC interrupt signal is not affected when a supply monitor detection occurs."]
222    #[inline(always)]
223    pub fn not_enable(self) -> &'a mut W {
224        self.variant(SMIEN_A::NOT_ENABLE)
225    }
226    #[doc = "The SUPC interrupt signal is asserted when a supply monitor detection occurs."]
227    #[inline(always)]
228    pub fn enable(self) -> &'a mut W {
229        self.variant(SMIEN_A::ENABLE)
230    }
231}
232impl R {
233    #[doc = "Bits 0:3 - Supply Monitor Threshold"]
234    #[inline(always)]
235    pub fn smth(&self) -> SMTH_R {
236        SMTH_R::new((self.bits & 0x0f) as u8)
237    }
238    #[doc = "Bits 8:10 - Supply Monitor Sampling Period"]
239    #[inline(always)]
240    pub fn smsmpl(&self) -> SMSMPL_R {
241        SMSMPL_R::new(((self.bits >> 8) & 7) as u8)
242    }
243    #[doc = "Bit 12 - Supply Monitor Reset Enable"]
244    #[inline(always)]
245    pub fn smrsten(&self) -> SMRSTEN_R {
246        SMRSTEN_R::new(((self.bits >> 12) & 1) != 0)
247    }
248    #[doc = "Bit 13 - Supply Monitor Interrupt Enable"]
249    #[inline(always)]
250    pub fn smien(&self) -> SMIEN_R {
251        SMIEN_R::new(((self.bits >> 13) & 1) != 0)
252    }
253}
254impl W {
255    #[doc = "Bits 0:3 - Supply Monitor Threshold"]
256    #[inline(always)]
257    #[must_use]
258    pub fn smth(&mut self) -> SMTH_W<0> {
259        SMTH_W::new(self)
260    }
261    #[doc = "Bits 8:10 - Supply Monitor Sampling Period"]
262    #[inline(always)]
263    #[must_use]
264    pub fn smsmpl(&mut self) -> SMSMPL_W<8> {
265        SMSMPL_W::new(self)
266    }
267    #[doc = "Bit 12 - Supply Monitor Reset Enable"]
268    #[inline(always)]
269    #[must_use]
270    pub fn smrsten(&mut self) -> SMRSTEN_W<12> {
271        SMRSTEN_W::new(self)
272    }
273    #[doc = "Bit 13 - Supply Monitor Interrupt Enable"]
274    #[inline(always)]
275    #[must_use]
276    pub fn smien(&mut self) -> SMIEN_W<13> {
277        SMIEN_W::new(self)
278    }
279    #[doc = "Writes raw bits to the register."]
280    #[inline(always)]
281    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
282        self.0.bits(bits);
283        self
284    }
285}
286#[doc = "Supply Controller Supply Monitor Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smmr](index.html) module"]
287pub struct SMMR_SPEC;
288impl crate::RegisterSpec for SMMR_SPEC {
289    type Ux = u32;
290}
291#[doc = "`read()` method returns [smmr::R](R) reader structure"]
292impl crate::Readable for SMMR_SPEC {
293    type Reader = R;
294}
295#[doc = "`write(|w| ..)` method takes [smmr::W](W) writer structure"]
296impl crate::Writable for SMMR_SPEC {
297    type Writer = W;
298    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
299    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
300}
301#[doc = "`reset()` method sets SMMR to value 0"]
302impl crate::Resettable for SMMR_SPEC {
303    const RESET_VALUE: Self::Ux = 0;
304}
atsam4sd32b_pac/supc/smmr.rs

atsam4sd32b_pac/supc/
smmr.rs
