atsam4sd32b_pac/pmc/
pmc_ier.rs

1#[doc = "Register `PMC_IER` writer"]
2pub struct W(crate::W<PMC_IER_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<PMC_IER_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<PMC_IER_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<PMC_IER_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `MOSCXTS` writer - Main Crystal Oscillator Status Interrupt Enable"]
23pub type MOSCXTS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
24#[doc = "Field `LOCKA` writer - PLLA Lock Interrupt Enable"]
25pub type LOCKA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
26#[doc = "Field `LOCKB` writer - PLLB Lock Interrupt Enable"]
27pub type LOCKB_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
28#[doc = "Field `MCKRDY` writer - Master Clock Ready Interrupt Enable"]
29pub type MCKRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
30#[doc = "Field `PCKRDY0` writer - Programmable Clock Ready 0 Interrupt Enable"]
31pub type PCKRDY0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
32#[doc = "Field `PCKRDY1` writer - Programmable Clock Ready 1 Interrupt Enable"]
33pub type PCKRDY1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
34#[doc = "Field `PCKRDY2` writer - Programmable Clock Ready 2 Interrupt Enable"]
35pub type PCKRDY2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
36#[doc = "Field `MOSCSELS` writer - Main Oscillator Selection Status Interrupt Enable"]
37pub type MOSCSELS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
38#[doc = "Field `MOSCRCS` writer - Main On-Chip RC Status Interrupt Enable"]
39pub type MOSCRCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
40#[doc = "Field `CFDEV` writer - Clock Failure Detector Event Interrupt Enable"]
41pub type CFDEV_W<'a, const O: u8> = crate::BitWriter<'a, u32, PMC_IER_SPEC, bool, O>;
42impl W {
43    #[doc = "Bit 0 - Main Crystal Oscillator Status Interrupt Enable"]
44    #[inline(always)]
45    #[must_use]
46    pub fn moscxts(&mut self) -> MOSCXTS_W<0> {
47        MOSCXTS_W::new(self)
48    }
49    #[doc = "Bit 1 - PLLA Lock Interrupt Enable"]
50    #[inline(always)]
51    #[must_use]
52    pub fn locka(&mut self) -> LOCKA_W<1> {
53        LOCKA_W::new(self)
54    }
55    #[doc = "Bit 2 - PLLB Lock Interrupt Enable"]
56    #[inline(always)]
57    #[must_use]
58    pub fn lockb(&mut self) -> LOCKB_W<2> {
59        LOCKB_W::new(self)
60    }
61    #[doc = "Bit 3 - Master Clock Ready Interrupt Enable"]
62    #[inline(always)]
63    #[must_use]
64    pub fn mckrdy(&mut self) -> MCKRDY_W<3> {
65        MCKRDY_W::new(self)
66    }
67    #[doc = "Bit 8 - Programmable Clock Ready 0 Interrupt Enable"]
68    #[inline(always)]
69    #[must_use]
70    pub fn pckrdy0(&mut self) -> PCKRDY0_W<8> {
71        PCKRDY0_W::new(self)
72    }
73    #[doc = "Bit 9 - Programmable Clock Ready 1 Interrupt Enable"]
74    #[inline(always)]
75    #[must_use]
76    pub fn pckrdy1(&mut self) -> PCKRDY1_W<9> {
77        PCKRDY1_W::new(self)
78    }
79    #[doc = "Bit 10 - Programmable Clock Ready 2 Interrupt Enable"]
80    #[inline(always)]
81    #[must_use]
82    pub fn pckrdy2(&mut self) -> PCKRDY2_W<10> {
83        PCKRDY2_W::new(self)
84    }
85    #[doc = "Bit 16 - Main Oscillator Selection Status Interrupt Enable"]
86    #[inline(always)]
87    #[must_use]
88    pub fn moscsels(&mut self) -> MOSCSELS_W<16> {
89        MOSCSELS_W::new(self)
90    }
91    #[doc = "Bit 17 - Main On-Chip RC Status Interrupt Enable"]
92    #[inline(always)]
93    #[must_use]
94    pub fn moscrcs(&mut self) -> MOSCRCS_W<17> {
95        MOSCRCS_W::new(self)
96    }
97    #[doc = "Bit 18 - Clock Failure Detector Event Interrupt Enable"]
98    #[inline(always)]
99    #[must_use]
100    pub fn cfdev(&mut self) -> CFDEV_W<18> {
101        CFDEV_W::new(self)
102    }
103    #[doc = "Writes raw bits to the register."]
104    #[inline(always)]
105    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
106        self.0.bits(bits);
107        self
108    }
109}
110#[doc = "Interrupt Enable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pmc_ier](index.html) module"]
111pub struct PMC_IER_SPEC;
112impl crate::RegisterSpec for PMC_IER_SPEC {
113    type Ux = u32;
114}
115#[doc = "`write(|w| ..)` method takes [pmc_ier::W](W) writer structure"]
116impl crate::Writable for PMC_IER_SPEC {
117    type Writer = W;
118    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
119    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120}
atsam4sd32b_pac/pmc/pmc_ier.rs

atsam4sd32b_pac/pmc/
pmc_ier.rs
