atsam4sa16c_pac/efc0/
fmr.rs

1#[doc = "Register `FMR` reader"]
2pub struct R(crate::R<FMR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FMR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FMR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FMR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `FMR` writer"]
17pub struct W(crate::W<FMR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<FMR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<FMR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<FMR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `FRDY` reader - Ready Interrupt Enable"]
38pub type FRDY_R = crate::BitReader<bool>;
39#[doc = "Field `FRDY` writer - Ready Interrupt Enable"]
40pub type FRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, FMR_SPEC, bool, O>;
41#[doc = "Field `FWS` reader - Flash Wait State"]
42pub type FWS_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `FWS` writer - Flash Wait State"]
44pub type FWS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FMR_SPEC, u8, u8, 4, O>;
45#[doc = "Field `SCOD` reader - Sequential Code Optimization Disable"]
46pub type SCOD_R = crate::BitReader<bool>;
47#[doc = "Field `SCOD` writer - Sequential Code Optimization Disable"]
48pub type SCOD_W<'a, const O: u8> = crate::BitWriter<'a, u32, FMR_SPEC, bool, O>;
49#[doc = "Field `FAM` reader - Flash Access Mode"]
50pub type FAM_R = crate::BitReader<bool>;
51#[doc = "Field `FAM` writer - Flash Access Mode"]
52pub type FAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, FMR_SPEC, bool, O>;
53#[doc = "Field `CLOE` reader - Code Loop Optimization Enable"]
54pub type CLOE_R = crate::BitReader<bool>;
55#[doc = "Field `CLOE` writer - Code Loop Optimization Enable"]
56pub type CLOE_W<'a, const O: u8> = crate::BitWriter<'a, u32, FMR_SPEC, bool, O>;
57impl R {
58    #[doc = "Bit 0 - Ready Interrupt Enable"]
59    #[inline(always)]
60    pub fn frdy(&self) -> FRDY_R {
61        FRDY_R::new((self.bits & 1) != 0)
62    }
63    #[doc = "Bits 8:11 - Flash Wait State"]
64    #[inline(always)]
65    pub fn fws(&self) -> FWS_R {
66        FWS_R::new(((self.bits >> 8) & 0x0f) as u8)
67    }
68    #[doc = "Bit 16 - Sequential Code Optimization Disable"]
69    #[inline(always)]
70    pub fn scod(&self) -> SCOD_R {
71        SCOD_R::new(((self.bits >> 16) & 1) != 0)
72    }
73    #[doc = "Bit 24 - Flash Access Mode"]
74    #[inline(always)]
75    pub fn fam(&self) -> FAM_R {
76        FAM_R::new(((self.bits >> 24) & 1) != 0)
77    }
78    #[doc = "Bit 26 - Code Loop Optimization Enable"]
79    #[inline(always)]
80    pub fn cloe(&self) -> CLOE_R {
81        CLOE_R::new(((self.bits >> 26) & 1) != 0)
82    }
83}
84impl W {
85    #[doc = "Bit 0 - Ready Interrupt Enable"]
86    #[inline(always)]
87    #[must_use]
88    pub fn frdy(&mut self) -> FRDY_W<0> {
89        FRDY_W::new(self)
90    }
91    #[doc = "Bits 8:11 - Flash Wait State"]
92    #[inline(always)]
93    #[must_use]
94    pub fn fws(&mut self) -> FWS_W<8> {
95        FWS_W::new(self)
96    }
97    #[doc = "Bit 16 - Sequential Code Optimization Disable"]
98    #[inline(always)]
99    #[must_use]
100    pub fn scod(&mut self) -> SCOD_W<16> {
101        SCOD_W::new(self)
102    }
103    #[doc = "Bit 24 - Flash Access Mode"]
104    #[inline(always)]
105    #[must_use]
106    pub fn fam(&mut self) -> FAM_W<24> {
107        FAM_W::new(self)
108    }
109    #[doc = "Bit 26 - Code Loop Optimization Enable"]
110    #[inline(always)]
111    #[must_use]
112    pub fn cloe(&mut self) -> CLOE_W<26> {
113        CLOE_W::new(self)
114    }
115    #[doc = "Writes raw bits to the register."]
116    #[inline(always)]
117    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
118        self.0.bits(bits);
119        self
120    }
121}
122#[doc = "EEFC Flash Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fmr](index.html) module"]
123pub struct FMR_SPEC;
124impl crate::RegisterSpec for FMR_SPEC {
125    type Ux = u32;
126}
127#[doc = "`read()` method returns [fmr::R](R) reader structure"]
128impl crate::Readable for FMR_SPEC {
129    type Reader = R;
130}
131#[doc = "`write(|w| ..)` method takes [fmr::W](W) writer structure"]
132impl crate::Writable for FMR_SPEC {
133    type Writer = W;
134    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
135    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
136}
137#[doc = "`reset()` method sets FMR to value 0x0400_0000"]
138impl crate::Resettable for FMR_SPEC {
139    const RESET_VALUE: Self::Ux = 0x0400_0000;
140}
atsam4sa16c_pac/efc0/fmr.rs

atsam4sa16c_pac/efc0/
fmr.rs
