atsam4sa16b_pac/ssc/
cr.rs

1#[doc = "Register `CR` writer"]
2pub struct W(crate::W<CR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `RXEN` writer - Receive Enable"]
23pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
24#[doc = "Field `RXDIS` writer - Receive Disable"]
25pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
26#[doc = "Field `TXEN` writer - Transmit Enable"]
27pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
28#[doc = "Field `TXDIS` writer - Transmit Disable"]
29pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
30#[doc = "Field `SWRST` writer - Software Reset"]
31pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
32impl W {
33    #[doc = "Bit 0 - Receive Enable"]
34    #[inline(always)]
35    #[must_use]
36    pub fn rxen(&mut self) -> RXEN_W<0> {
37        RXEN_W::new(self)
38    }
39    #[doc = "Bit 1 - Receive Disable"]
40    #[inline(always)]
41    #[must_use]
42    pub fn rxdis(&mut self) -> RXDIS_W<1> {
43        RXDIS_W::new(self)
44    }
45    #[doc = "Bit 8 - Transmit Enable"]
46    #[inline(always)]
47    #[must_use]
48    pub fn txen(&mut self) -> TXEN_W<8> {
49        TXEN_W::new(self)
50    }
51    #[doc = "Bit 9 - Transmit Disable"]
52    #[inline(always)]
53    #[must_use]
54    pub fn txdis(&mut self) -> TXDIS_W<9> {
55        TXDIS_W::new(self)
56    }
57    #[doc = "Bit 15 - Software Reset"]
58    #[inline(always)]
59    #[must_use]
60    pub fn swrst(&mut self) -> SWRST_W<15> {
61        SWRST_W::new(self)
62    }
63    #[doc = "Writes raw bits to the register."]
64    #[inline(always)]
65    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
66        self.0.bits(bits);
67        self
68    }
69}
70#[doc = "Control Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](index.html) module"]
71pub struct CR_SPEC;
72impl crate::RegisterSpec for CR_SPEC {
73    type Ux = u32;
74}
75#[doc = "`write(|w| ..)` method takes [cr::W](W) writer structure"]
76impl crate::Writable for CR_SPEC {
77    type Writer = W;
78    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
79    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
80}
atsam4sa16b_pac/ssc/cr.rs

atsam4sa16b_pac/ssc/
cr.rs
