atsam4s2c_pac/
udp.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00 - Frame Number Register"]
5    pub frm_num: FRM_NUM,
6    #[doc = "0x04 - Global State Register"]
7    pub glb_stat: GLB_STAT,
8    #[doc = "0x08 - Function Address Register"]
9    pub faddr: FADDR,
10    _reserved3: [u8; 0x04],
11    #[doc = "0x10 - Interrupt Enable Register"]
12    pub ier: IER,
13    #[doc = "0x14 - Interrupt Disable Register"]
14    pub idr: IDR,
15    #[doc = "0x18 - Interrupt Mask Register"]
16    pub imr: IMR,
17    #[doc = "0x1c - Interrupt Status Register"]
18    pub isr: ISR,
19    #[doc = "0x20 - Interrupt Clear Register"]
20    pub icr: ICR,
21    _reserved8: [u8; 0x04],
22    #[doc = "0x28 - Reset Endpoint Register"]
23    pub rst_ep: RST_EP,
24    _reserved9: [u8; 0x04],
25    _reserved_9_csr: [u8; 0x20],
26    #[doc = "0x50..0x70 - Endpoint FIFO Data Register"]
27    pub fdr: [FDR; 8],
28    _reserved11: [u8; 0x04],
29    #[doc = "0x74 - Transceiver Control Register"]
30    pub txvc: TXVC,
31}
32impl RegisterBlock {
33    #[doc = "0x30 - Endpoint Control and Status Register"]
34    #[inline(always)]
35    pub const fn isochronous_csr0_isochronous(&self) -> &ISOCHRONOUS_CSR0_ISOCHRONOUS {
36        unsafe { &*(self as *const Self).cast::<u8>().add(48usize).cast() }
37    }
38    #[doc = "0x30..0x50 - Endpoint Control and Status Register"]
39    #[inline(always)]
40    pub const fn csr(&self) -> &[CSR; 8] {
41        unsafe { &*(self as *const Self).cast::<u8>().add(48usize).cast() }
42    }
43}
44#[doc = "FRM_NUM (r) register accessor: an alias for `Reg<FRM_NUM_SPEC>`"]
45pub type FRM_NUM = crate::Reg<frm_num::FRM_NUM_SPEC>;
46#[doc = "Frame Number Register"]
47pub mod frm_num;
48#[doc = "GLB_STAT (rw) register accessor: an alias for `Reg<GLB_STAT_SPEC>`"]
49pub type GLB_STAT = crate::Reg<glb_stat::GLB_STAT_SPEC>;
50#[doc = "Global State Register"]
51pub mod glb_stat;
52#[doc = "FADDR (rw) register accessor: an alias for `Reg<FADDR_SPEC>`"]
53pub type FADDR = crate::Reg<faddr::FADDR_SPEC>;
54#[doc = "Function Address Register"]
55pub mod faddr;
56#[doc = "IER (w) register accessor: an alias for `Reg<IER_SPEC>`"]
57pub type IER = crate::Reg<ier::IER_SPEC>;
58#[doc = "Interrupt Enable Register"]
59pub mod ier;
60#[doc = "IDR (w) register accessor: an alias for `Reg<IDR_SPEC>`"]
61pub type IDR = crate::Reg<idr::IDR_SPEC>;
62#[doc = "Interrupt Disable Register"]
63pub mod idr;
64#[doc = "IMR (r) register accessor: an alias for `Reg<IMR_SPEC>`"]
65pub type IMR = crate::Reg<imr::IMR_SPEC>;
66#[doc = "Interrupt Mask Register"]
67pub mod imr;
68#[doc = "ISR (r) register accessor: an alias for `Reg<ISR_SPEC>`"]
69pub type ISR = crate::Reg<isr::ISR_SPEC>;
70#[doc = "Interrupt Status Register"]
71pub mod isr;
72#[doc = "ICR (w) register accessor: an alias for `Reg<ICR_SPEC>`"]
73pub type ICR = crate::Reg<icr::ICR_SPEC>;
74#[doc = "Interrupt Clear Register"]
75pub mod icr;
76#[doc = "RST_EP (rw) register accessor: an alias for `Reg<RST_EP_SPEC>`"]
77pub type RST_EP = crate::Reg<rst_ep::RST_EP_SPEC>;
78#[doc = "Reset Endpoint Register"]
79pub mod rst_ep;
80#[doc = "CSR (rw) register accessor: an alias for `Reg<CSR_SPEC>`"]
81pub type CSR = crate::Reg<csr::CSR_SPEC>;
82#[doc = "Endpoint Control and Status Register"]
83pub mod csr;
84#[doc = "ISOCHRONOUS_CSR0_ISOCHRONOUS (rw) register accessor: an alias for `Reg<ISOCHRONOUS_CSR0_ISOCHRONOUS_SPEC>`"]
85pub type ISOCHRONOUS_CSR0_ISOCHRONOUS =
86    crate::Reg<isochronous_csr0_isochronous::ISOCHRONOUS_CSR0_ISOCHRONOUS_SPEC>;
87#[doc = "Endpoint Control and Status Register"]
88pub mod isochronous_csr0_isochronous;
89#[doc = "FDR (rw) register accessor: an alias for `Reg<FDR_SPEC>`"]
90pub type FDR = crate::Reg<fdr::FDR_SPEC>;
91#[doc = "Endpoint FIFO Data Register"]
92pub mod fdr;
93#[doc = "TXVC (rw) register accessor: an alias for `Reg<TXVC_SPEC>`"]
94pub type TXVC = crate::Reg<txvc::TXVC_SPEC>;
95#[doc = "Transceiver Control Register"]
96pub mod txvc;