atsam4ls2b_pac/pm/
cpusel.rs

1#[doc = "Register `CPUSEL` reader"]
2pub struct R(crate::R<CPUSEL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CPUSEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CPUSEL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CPUSEL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CPUSEL` writer"]
17pub struct W(crate::W<CPUSEL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CPUSEL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CPUSEL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CPUSEL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CPUSEL` reader - CPU Clock Select"]
38pub type CPUSEL_R = crate::FieldReader<u8, CPUSELSELECT_A>;
39#[doc = "CPU Clock Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum CPUSELSELECT_A {
43    #[doc = "0: fCPU:fmain. CPUDIV:"]
44    _0 = 0,
45    #[doc = "1: fCPU:fmain / 2^(CPUSEL+1)"]
46    _1 = 1,
47}
48impl From<CPUSELSELECT_A> for u8 {
49    #[inline(always)]
50    fn from(variant: CPUSELSELECT_A) -> Self {
51        variant as _
52    }
53}
54impl CPUSEL_R {
55    #[doc = "Get enumerated values variant"]
56    #[inline(always)]
57    pub fn variant(&self) -> Option<CPUSELSELECT_A> {
58        match self.bits {
59            0 => Some(CPUSELSELECT_A::_0),
60            1 => Some(CPUSELSELECT_A::_1),
61            _ => None,
62        }
63    }
64    #[doc = "Checks if the value of the field is `_0`"]
65    #[inline(always)]
66    pub fn is_0(&self) -> bool {
67        *self == CPUSELSELECT_A::_0
68    }
69    #[doc = "Checks if the value of the field is `_1`"]
70    #[inline(always)]
71    pub fn is_1(&self) -> bool {
72        *self == CPUSELSELECT_A::_1
73    }
74}
75#[doc = "Field `CPUSEL` writer - CPU Clock Select"]
76pub type CPUSEL_W<'a, const O: u8> =
77    crate::FieldWriter<'a, u32, CPUSEL_SPEC, u8, CPUSELSELECT_A, 3, O>;
78impl<'a, const O: u8> CPUSEL_W<'a, O> {
79    #[doc = "fCPU:fmain. CPUDIV:"]
80    #[inline(always)]
81    pub fn _0(self) -> &'a mut W {
82        self.variant(CPUSELSELECT_A::_0)
83    }
84    #[doc = "fCPU:fmain / 2^(CPUSEL+1)"]
85    #[inline(always)]
86    pub fn _1(self) -> &'a mut W {
87        self.variant(CPUSELSELECT_A::_1)
88    }
89}
90#[doc = "Field `CPUDIV` reader - CPU Division"]
91pub type CPUDIV_R = crate::BitReader<bool>;
92#[doc = "Field `CPUDIV` writer - CPU Division"]
93pub type CPUDIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CPUSEL_SPEC, bool, O>;
94impl R {
95    #[doc = "Bits 0:2 - CPU Clock Select"]
96    #[inline(always)]
97    pub fn cpusel(&self) -> CPUSEL_R {
98        CPUSEL_R::new((self.bits & 7) as u8)
99    }
100    #[doc = "Bit 7 - CPU Division"]
101    #[inline(always)]
102    pub fn cpudiv(&self) -> CPUDIV_R {
103        CPUDIV_R::new(((self.bits >> 7) & 1) != 0)
104    }
105}
106impl W {
107    #[doc = "Bits 0:2 - CPU Clock Select"]
108    #[inline(always)]
109    #[must_use]
110    pub fn cpusel(&mut self) -> CPUSEL_W<0> {
111        CPUSEL_W::new(self)
112    }
113    #[doc = "Bit 7 - CPU Division"]
114    #[inline(always)]
115    #[must_use]
116    pub fn cpudiv(&mut self) -> CPUDIV_W<7> {
117        CPUDIV_W::new(self)
118    }
119    #[doc = "Writes raw bits to the register."]
120    #[inline(always)]
121    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
122        self.0.bits(bits);
123        self
124    }
125}
126#[doc = "CPU Clock Select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpusel](index.html) module"]
127pub struct CPUSEL_SPEC;
128impl crate::RegisterSpec for CPUSEL_SPEC {
129    type Ux = u32;
130}
131#[doc = "`read()` method returns [cpusel::R](R) reader structure"]
132impl crate::Readable for CPUSEL_SPEC {
133    type Reader = R;
134}
135#[doc = "`write(|w| ..)` method takes [cpusel::W](W) writer structure"]
136impl crate::Writable for CPUSEL_SPEC {
137    type Writer = W;
138    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
139    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
140}
141#[doc = "`reset()` method sets CPUSEL to value 0"]
142impl crate::Resettable for CPUSEL_SPEC {
143    const RESET_VALUE: Self::Ux = 0;
144}
atsam4ls2b_pac/pm/cpusel.rs

atsam4ls2b_pac/pm/
cpusel.rs
