atsam4lc8c_pac/parc/
icr.rs1#[doc = "Register `ICR` writer"]
2pub struct W(crate::W<ICR_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<ICR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<ICR_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<ICR_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `DRDY` writer - Data Ready Interrupt Status Clear"]
23pub type DRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
24#[doc = "Field `OVR` writer - Overrun Interrupt Status Clear"]
25pub type OVR_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
26impl W {
27 #[doc = "Bit 2 - Data Ready Interrupt Status Clear"]
28 #[inline(always)]
29 #[must_use]
30 pub fn drdy(&mut self) -> DRDY_W<2> {
31 DRDY_W::new(self)
32 }
33 #[doc = "Bit 3 - Overrun Interrupt Status Clear"]
34 #[inline(always)]
35 #[must_use]
36 pub fn ovr(&mut self) -> OVR_W<3> {
37 OVR_W::new(self)
38 }
39 #[doc = "Writes raw bits to the register."]
40 #[inline(always)]
41 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
42 self.0.bits(bits);
43 self
44 }
45}
46#[doc = "Interrupt Status Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icr](index.html) module"]
47pub struct ICR_SPEC;
48impl crate::RegisterSpec for ICR_SPEC {
49 type Ux = u32;
50}
51#[doc = "`write(|w| ..)` method takes [icr::W](W) writer structure"]
52impl crate::Writable for ICR_SPEC {
53 type Writer = W;
54 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
55 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
56}
57#[doc = "`reset()` method sets ICR to value 0"]
58impl crate::Resettable for ICR_SPEC {
59 const RESET_VALUE: Self::Ux = 0;
60}