atsam4lc8c_pac/pdca/
imr.rs

1#[doc = "Register `IMR%s` reader"]
2pub struct R(crate::R<IMR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IMR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IMR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IMR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `RCZ` reader - Reload Counter Zero"]
17pub type RCZ_R = crate::BitReader<bool>;
18#[doc = "Field `TRC` reader - Transfer Complete"]
19pub type TRC_R = crate::BitReader<bool>;
20#[doc = "Field `TERR` reader - Transfer Error"]
21pub type TERR_R = crate::BitReader<bool>;
22impl R {
23    #[doc = "Bit 0 - Reload Counter Zero"]
24    #[inline(always)]
25    pub fn rcz(&self) -> RCZ_R {
26        RCZ_R::new((self.bits & 1) != 0)
27    }
28    #[doc = "Bit 1 - Transfer Complete"]
29    #[inline(always)]
30    pub fn trc(&self) -> TRC_R {
31        TRC_R::new(((self.bits >> 1) & 1) != 0)
32    }
33    #[doc = "Bit 2 - Transfer Error"]
34    #[inline(always)]
35    pub fn terr(&self) -> TERR_R {
36        TERR_R::new(((self.bits >> 2) & 1) != 0)
37    }
38}
39#[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr](index.html) module"]
40pub struct IMR_SPEC;
41impl crate::RegisterSpec for IMR_SPEC {
42    type Ux = u32;
43}
44#[doc = "`read()` method returns [imr::R](R) reader structure"]
45impl crate::Readable for IMR_SPEC {
46    type Reader = R;
47}
48#[doc = "`reset()` method sets IMR%s to value 0"]
49impl crate::Resettable for IMR_SPEC {
50    const RESET_VALUE: Self::Ux = 0;
51}
atsam4lc8c_pac/pdca/imr.rs

atsam4lc8c_pac/pdca/
imr.rs
