atsam4lc8b_pac/lcdca/
sr.rs

1#[doc = "Register `SR` reader"]
2pub struct R(crate::R<SR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `FC0R` reader - Frame Counter 0 Rollover"]
17pub type FC0R_R = crate::BitReader<bool>;
18#[doc = "Field `FC0S` reader - Frame Counter 0 Status"]
19pub type FC0S_R = crate::BitReader<bool>;
20#[doc = "Field `FC1S` reader - Frame Counter 1 Status"]
21pub type FC1S_R = crate::BitReader<bool>;
22#[doc = "Field `FC2S` reader - Frame Counter 2 Status"]
23pub type FC2S_R = crate::BitReader<bool>;
24#[doc = "Field `EN` reader - LCDCA Status"]
25pub type EN_R = crate::BitReader<bool>;
26#[doc = "Field `WEN` reader - Wake up Status"]
27pub type WEN_R = crate::BitReader<bool>;
28#[doc = "Field `BLKS` reader - Blink Status"]
29pub type BLKS_R = crate::BitReader<bool>;
30#[doc = "Field `CSRS` reader - Circular Shift Register Status"]
31pub type CSRS_R = crate::BitReader<bool>;
32#[doc = "Field `CPS` reader - Charge Pump Status"]
33pub type CPS_R = crate::BitReader<bool>;
34impl R {
35    #[doc = "Bit 0 - Frame Counter 0 Rollover"]
36    #[inline(always)]
37    pub fn fc0r(&self) -> FC0R_R {
38        FC0R_R::new((self.bits & 1) != 0)
39    }
40    #[doc = "Bit 1 - Frame Counter 0 Status"]
41    #[inline(always)]
42    pub fn fc0s(&self) -> FC0S_R {
43        FC0S_R::new(((self.bits >> 1) & 1) != 0)
44    }
45    #[doc = "Bit 2 - Frame Counter 1 Status"]
46    #[inline(always)]
47    pub fn fc1s(&self) -> FC1S_R {
48        FC1S_R::new(((self.bits >> 2) & 1) != 0)
49    }
50    #[doc = "Bit 3 - Frame Counter 2 Status"]
51    #[inline(always)]
52    pub fn fc2s(&self) -> FC2S_R {
53        FC2S_R::new(((self.bits >> 3) & 1) != 0)
54    }
55    #[doc = "Bit 4 - LCDCA Status"]
56    #[inline(always)]
57    pub fn en(&self) -> EN_R {
58        EN_R::new(((self.bits >> 4) & 1) != 0)
59    }
60    #[doc = "Bit 5 - Wake up Status"]
61    #[inline(always)]
62    pub fn wen(&self) -> WEN_R {
63        WEN_R::new(((self.bits >> 5) & 1) != 0)
64    }
65    #[doc = "Bit 6 - Blink Status"]
66    #[inline(always)]
67    pub fn blks(&self) -> BLKS_R {
68        BLKS_R::new(((self.bits >> 6) & 1) != 0)
69    }
70    #[doc = "Bit 7 - Circular Shift Register Status"]
71    #[inline(always)]
72    pub fn csrs(&self) -> CSRS_R {
73        CSRS_R::new(((self.bits >> 7) & 1) != 0)
74    }
75    #[doc = "Bit 8 - Charge Pump Status"]
76    #[inline(always)]
77    pub fn cps(&self) -> CPS_R {
78        CPS_R::new(((self.bits >> 8) & 1) != 0)
79    }
80}
81#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](index.html) module"]
82pub struct SR_SPEC;
83impl crate::RegisterSpec for SR_SPEC {
84    type Ux = u32;
85}
86#[doc = "`read()` method returns [sr::R](R) reader structure"]
87impl crate::Readable for SR_SPEC {
88    type Reader = R;
89}
90#[doc = "`reset()` method sets SR to value 0"]
91impl crate::Resettable for SR_SPEC {
92    const RESET_VALUE: Self::Ux = 0;
93}
atsam4lc8b_pac/lcdca/sr.rs

atsam4lc8b_pac/lcdca/
sr.rs
