1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - DMAC Global Configuration Register"]
5 pub gcfg: GCFG,
6 #[doc = "0x04 - DMAC Enable Register"]
7 pub en: EN,
8 #[doc = "0x08 - DMAC Software Single Request Register"]
9 pub sreq: SREQ,
10 #[doc = "0x0c - DMAC Software Chunk Transfer Request Register"]
11 pub creq: CREQ,
12 #[doc = "0x10 - DMAC Software Last Transfer Flag Register"]
13 pub last: LAST,
14 _reserved5: [u8; 0x04],
15 #[doc = "0x18 - DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Enable register."]
16 pub ebcier: EBCIER,
17 #[doc = "0x1c - DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Disable register."]
18 pub ebcidr: EBCIDR,
19 #[doc = "0x20 - DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Mask Register."]
20 pub ebcimr: EBCIMR,
21 #[doc = "0x24 - DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Status Register."]
22 pub ebcisr: EBCISR,
23 #[doc = "0x28 - DMAC Channel Handler Enable Register"]
24 pub cher: CHER,
25 #[doc = "0x2c - DMAC Channel Handler Disable Register"]
26 pub chdr: CHDR,
27 #[doc = "0x30 - DMAC Channel Handler Status Register"]
28 pub chsr: CHSR,
29 _reserved12: [u8; 0x08],
30 #[doc = "0x3c - DMAC Channel Source Address Register (ch_num = 0)"]
31 pub saddr0: SADDR0,
32 #[doc = "0x40 - DMAC Channel Destination Address Register (ch_num = 0)"]
33 pub daddr0: DADDR0,
34 #[doc = "0x44 - DMAC Channel Descriptor Address Register (ch_num = 0)"]
35 pub dscr0: DSCR0,
36 #[doc = "0x48 - DMAC Channel Control A Register (ch_num = 0)"]
37 pub ctrla0: CTRLA0,
38 #[doc = "0x4c - DMAC Channel Control B Register (ch_num = 0)"]
39 pub ctrlb0: CTRLB0,
40 #[doc = "0x50 - DMAC Channel Configuration Register (ch_num = 0)"]
41 pub cfg0: CFG0,
42 _reserved18: [u8; 0x10],
43 #[doc = "0x64 - DMAC Channel Source Address Register (ch_num = 1)"]
44 pub saddr1: SADDR1,
45 #[doc = "0x68 - DMAC Channel Destination Address Register (ch_num = 1)"]
46 pub daddr1: DADDR1,
47 #[doc = "0x6c - DMAC Channel Descriptor Address Register (ch_num = 1)"]
48 pub dscr1: DSCR1,
49 #[doc = "0x70 - DMAC Channel Control A Register (ch_num = 1)"]
50 pub ctrla1: CTRLA1,
51 #[doc = "0x74 - DMAC Channel Control B Register (ch_num = 1)"]
52 pub ctrlb1: CTRLB1,
53 #[doc = "0x78 - DMAC Channel Configuration Register (ch_num = 1)"]
54 pub cfg1: CFG1,
55 _reserved24: [u8; 0x10],
56 #[doc = "0x8c - DMAC Channel Source Address Register (ch_num = 2)"]
57 pub saddr2: SADDR2,
58 #[doc = "0x90 - DMAC Channel Destination Address Register (ch_num = 2)"]
59 pub daddr2: DADDR2,
60 #[doc = "0x94 - DMAC Channel Descriptor Address Register (ch_num = 2)"]
61 pub dscr2: DSCR2,
62 #[doc = "0x98 - DMAC Channel Control A Register (ch_num = 2)"]
63 pub ctrla2: CTRLA2,
64 #[doc = "0x9c - DMAC Channel Control B Register (ch_num = 2)"]
65 pub ctrlb2: CTRLB2,
66 #[doc = "0xa0 - DMAC Channel Configuration Register (ch_num = 2)"]
67 pub cfg2: CFG2,
68 _reserved30: [u8; 0x10],
69 #[doc = "0xb4 - DMAC Channel Source Address Register (ch_num = 3)"]
70 pub saddr3: SADDR3,
71 #[doc = "0xb8 - DMAC Channel Destination Address Register (ch_num = 3)"]
72 pub daddr3: DADDR3,
73 #[doc = "0xbc - DMAC Channel Descriptor Address Register (ch_num = 3)"]
74 pub dscr3: DSCR3,
75 #[doc = "0xc0 - DMAC Channel Control A Register (ch_num = 3)"]
76 pub ctrla3: CTRLA3,
77 #[doc = "0xc4 - DMAC Channel Control B Register (ch_num = 3)"]
78 pub ctrlb3: CTRLB3,
79 #[doc = "0xc8 - DMAC Channel Configuration Register (ch_num = 3)"]
80 pub cfg3: CFG3,
81 _reserved36: [u8; 0x0118],
82 #[doc = "0x1e4 - DMAC Write Protect Mode Register"]
83 pub wpmr: WPMR,
84 #[doc = "0x1e8 - DMAC Write Protect Status Register"]
85 pub wpsr: WPSR,
86}
87#[doc = "GCFG (rw) register accessor: an alias for `Reg<GCFG_SPEC>`"]
88pub type GCFG = crate::Reg<gcfg::GCFG_SPEC>;
89#[doc = "DMAC Global Configuration Register"]
90pub mod gcfg;
91#[doc = "EN (rw) register accessor: an alias for `Reg<EN_SPEC>`"]
92pub type EN = crate::Reg<en::EN_SPEC>;
93#[doc = "DMAC Enable Register"]
94pub mod en;
95#[doc = "SREQ (rw) register accessor: an alias for `Reg<SREQ_SPEC>`"]
96pub type SREQ = crate::Reg<sreq::SREQ_SPEC>;
97#[doc = "DMAC Software Single Request Register"]
98pub mod sreq;
99#[doc = "CREQ (rw) register accessor: an alias for `Reg<CREQ_SPEC>`"]
100pub type CREQ = crate::Reg<creq::CREQ_SPEC>;
101#[doc = "DMAC Software Chunk Transfer Request Register"]
102pub mod creq;
103#[doc = "LAST (rw) register accessor: an alias for `Reg<LAST_SPEC>`"]
104pub type LAST = crate::Reg<last::LAST_SPEC>;
105#[doc = "DMAC Software Last Transfer Flag Register"]
106pub mod last;
107#[doc = "EBCIER (w) register accessor: an alias for `Reg<EBCIER_SPEC>`"]
108pub type EBCIER = crate::Reg<ebcier::EBCIER_SPEC>;
109#[doc = "DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Enable register."]
110pub mod ebcier;
111#[doc = "EBCIDR (w) register accessor: an alias for `Reg<EBCIDR_SPEC>`"]
112pub type EBCIDR = crate::Reg<ebcidr::EBCIDR_SPEC>;
113#[doc = "DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Disable register."]
114pub mod ebcidr;
115#[doc = "EBCIMR (r) register accessor: an alias for `Reg<EBCIMR_SPEC>`"]
116pub type EBCIMR = crate::Reg<ebcimr::EBCIMR_SPEC>;
117#[doc = "DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Mask Register."]
118pub mod ebcimr;
119#[doc = "EBCISR (r) register accessor: an alias for `Reg<EBCISR_SPEC>`"]
120pub type EBCISR = crate::Reg<ebcisr::EBCISR_SPEC>;
121#[doc = "DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Status Register."]
122pub mod ebcisr;
123#[doc = "CHER (w) register accessor: an alias for `Reg<CHER_SPEC>`"]
124pub type CHER = crate::Reg<cher::CHER_SPEC>;
125#[doc = "DMAC Channel Handler Enable Register"]
126pub mod cher;
127#[doc = "CHDR (w) register accessor: an alias for `Reg<CHDR_SPEC>`"]
128pub type CHDR = crate::Reg<chdr::CHDR_SPEC>;
129#[doc = "DMAC Channel Handler Disable Register"]
130pub mod chdr;
131#[doc = "CHSR (r) register accessor: an alias for `Reg<CHSR_SPEC>`"]
132pub type CHSR = crate::Reg<chsr::CHSR_SPEC>;
133#[doc = "DMAC Channel Handler Status Register"]
134pub mod chsr;
135#[doc = "SADDR0 (rw) register accessor: an alias for `Reg<SADDR0_SPEC>`"]
136pub type SADDR0 = crate::Reg<saddr0::SADDR0_SPEC>;
137#[doc = "DMAC Channel Source Address Register (ch_num = 0)"]
138pub mod saddr0;
139#[doc = "DADDR0 (rw) register accessor: an alias for `Reg<DADDR0_SPEC>`"]
140pub type DADDR0 = crate::Reg<daddr0::DADDR0_SPEC>;
141#[doc = "DMAC Channel Destination Address Register (ch_num = 0)"]
142pub mod daddr0;
143#[doc = "DSCR0 (rw) register accessor: an alias for `Reg<DSCR0_SPEC>`"]
144pub type DSCR0 = crate::Reg<dscr0::DSCR0_SPEC>;
145#[doc = "DMAC Channel Descriptor Address Register (ch_num = 0)"]
146pub mod dscr0;
147#[doc = "CTRLA0 (rw) register accessor: an alias for `Reg<CTRLA0_SPEC>`"]
148pub type CTRLA0 = crate::Reg<ctrla0::CTRLA0_SPEC>;
149#[doc = "DMAC Channel Control A Register (ch_num = 0)"]
150pub mod ctrla0;
151#[doc = "CTRLB0 (rw) register accessor: an alias for `Reg<CTRLB0_SPEC>`"]
152pub type CTRLB0 = crate::Reg<ctrlb0::CTRLB0_SPEC>;
153#[doc = "DMAC Channel Control B Register (ch_num = 0)"]
154pub mod ctrlb0;
155#[doc = "CFG0 (rw) register accessor: an alias for `Reg<CFG0_SPEC>`"]
156pub type CFG0 = crate::Reg<cfg0::CFG0_SPEC>;
157#[doc = "DMAC Channel Configuration Register (ch_num = 0)"]
158pub mod cfg0;
159#[doc = "SADDR1 (rw) register accessor: an alias for `Reg<SADDR1_SPEC>`"]
160pub type SADDR1 = crate::Reg<saddr1::SADDR1_SPEC>;
161#[doc = "DMAC Channel Source Address Register (ch_num = 1)"]
162pub mod saddr1;
163#[doc = "DADDR1 (rw) register accessor: an alias for `Reg<DADDR1_SPEC>`"]
164pub type DADDR1 = crate::Reg<daddr1::DADDR1_SPEC>;
165#[doc = "DMAC Channel Destination Address Register (ch_num = 1)"]
166pub mod daddr1;
167#[doc = "DSCR1 (rw) register accessor: an alias for `Reg<DSCR1_SPEC>`"]
168pub type DSCR1 = crate::Reg<dscr1::DSCR1_SPEC>;
169#[doc = "DMAC Channel Descriptor Address Register (ch_num = 1)"]
170pub mod dscr1;
171#[doc = "CTRLA1 (rw) register accessor: an alias for `Reg<CTRLA1_SPEC>`"]
172pub type CTRLA1 = crate::Reg<ctrla1::CTRLA1_SPEC>;
173#[doc = "DMAC Channel Control A Register (ch_num = 1)"]
174pub mod ctrla1;
175#[doc = "CTRLB1 (rw) register accessor: an alias for `Reg<CTRLB1_SPEC>`"]
176pub type CTRLB1 = crate::Reg<ctrlb1::CTRLB1_SPEC>;
177#[doc = "DMAC Channel Control B Register (ch_num = 1)"]
178pub mod ctrlb1;
179#[doc = "CFG1 (rw) register accessor: an alias for `Reg<CFG1_SPEC>`"]
180pub type CFG1 = crate::Reg<cfg1::CFG1_SPEC>;
181#[doc = "DMAC Channel Configuration Register (ch_num = 1)"]
182pub mod cfg1;
183#[doc = "SADDR2 (rw) register accessor: an alias for `Reg<SADDR2_SPEC>`"]
184pub type SADDR2 = crate::Reg<saddr2::SADDR2_SPEC>;
185#[doc = "DMAC Channel Source Address Register (ch_num = 2)"]
186pub mod saddr2;
187#[doc = "DADDR2 (rw) register accessor: an alias for `Reg<DADDR2_SPEC>`"]
188pub type DADDR2 = crate::Reg<daddr2::DADDR2_SPEC>;
189#[doc = "DMAC Channel Destination Address Register (ch_num = 2)"]
190pub mod daddr2;
191#[doc = "DSCR2 (rw) register accessor: an alias for `Reg<DSCR2_SPEC>`"]
192pub type DSCR2 = crate::Reg<dscr2::DSCR2_SPEC>;
193#[doc = "DMAC Channel Descriptor Address Register (ch_num = 2)"]
194pub mod dscr2;
195#[doc = "CTRLA2 (rw) register accessor: an alias for `Reg<CTRLA2_SPEC>`"]
196pub type CTRLA2 = crate::Reg<ctrla2::CTRLA2_SPEC>;
197#[doc = "DMAC Channel Control A Register (ch_num = 2)"]
198pub mod ctrla2;
199#[doc = "CTRLB2 (rw) register accessor: an alias for `Reg<CTRLB2_SPEC>`"]
200pub type CTRLB2 = crate::Reg<ctrlb2::CTRLB2_SPEC>;
201#[doc = "DMAC Channel Control B Register (ch_num = 2)"]
202pub mod ctrlb2;
203#[doc = "CFG2 (rw) register accessor: an alias for `Reg<CFG2_SPEC>`"]
204pub type CFG2 = crate::Reg<cfg2::CFG2_SPEC>;
205#[doc = "DMAC Channel Configuration Register (ch_num = 2)"]
206pub mod cfg2;
207#[doc = "SADDR3 (rw) register accessor: an alias for `Reg<SADDR3_SPEC>`"]
208pub type SADDR3 = crate::Reg<saddr3::SADDR3_SPEC>;
209#[doc = "DMAC Channel Source Address Register (ch_num = 3)"]
210pub mod saddr3;
211#[doc = "DADDR3 (rw) register accessor: an alias for `Reg<DADDR3_SPEC>`"]
212pub type DADDR3 = crate::Reg<daddr3::DADDR3_SPEC>;
213#[doc = "DMAC Channel Destination Address Register (ch_num = 3)"]
214pub mod daddr3;
215#[doc = "DSCR3 (rw) register accessor: an alias for `Reg<DSCR3_SPEC>`"]
216pub type DSCR3 = crate::Reg<dscr3::DSCR3_SPEC>;
217#[doc = "DMAC Channel Descriptor Address Register (ch_num = 3)"]
218pub mod dscr3;
219#[doc = "CTRLA3 (rw) register accessor: an alias for `Reg<CTRLA3_SPEC>`"]
220pub type CTRLA3 = crate::Reg<ctrla3::CTRLA3_SPEC>;
221#[doc = "DMAC Channel Control A Register (ch_num = 3)"]
222pub mod ctrla3;
223#[doc = "CTRLB3 (rw) register accessor: an alias for `Reg<CTRLB3_SPEC>`"]
224pub type CTRLB3 = crate::Reg<ctrlb3::CTRLB3_SPEC>;
225#[doc = "DMAC Channel Control B Register (ch_num = 3)"]
226pub mod ctrlb3;
227#[doc = "CFG3 (rw) register accessor: an alias for `Reg<CFG3_SPEC>`"]
228pub type CFG3 = crate::Reg<cfg3::CFG3_SPEC>;
229#[doc = "DMAC Channel Configuration Register (ch_num = 3)"]
230pub mod cfg3;
231#[doc = "WPMR (rw) register accessor: an alias for `Reg<WPMR_SPEC>`"]
232pub type WPMR = crate::Reg<wpmr::WPMR_SPEC>;
233#[doc = "DMAC Write Protect Mode Register"]
234pub mod wpmr;
235#[doc = "WPSR (r) register accessor: an alias for `Reg<WPSR_SPEC>`"]
236pub type WPSR = crate::Reg<wpsr::WPSR_SPEC>;
237#[doc = "DMAC Write Protect Status Register"]
238pub mod wpsr;