1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - Channel Control Register (channel = 0)"]
5 pub ccr0: CCR0,
6 _reserved_1_cmr0: [u8; 0x04],
7 #[doc = "0x08 - Stepper Motor Mode Register (channel = 0)"]
8 pub smmr0: SMMR0,
9 #[doc = "0x0c - Register AB (channel = 0)"]
10 pub rab0: RAB0,
11 #[doc = "0x10 - Counter Value (channel = 0)"]
12 pub cv0: CV0,
13 #[doc = "0x14 - Register A (channel = 0)"]
14 pub ra0: RA0,
15 #[doc = "0x18 - Register B (channel = 0)"]
16 pub rb0: RB0,
17 #[doc = "0x1c - Register C (channel = 0)"]
18 pub rc0: RC0,
19 #[doc = "0x20 - Status Register (channel = 0)"]
20 pub sr0: SR0,
21 #[doc = "0x24 - Interrupt Enable Register (channel = 0)"]
22 pub ier0: IER0,
23 #[doc = "0x28 - Interrupt Disable Register (channel = 0)"]
24 pub idr0: IDR0,
25 #[doc = "0x2c - Interrupt Mask Register (channel = 0)"]
26 pub imr0: IMR0,
27 #[doc = "0x30 - Extended Mode Register (channel = 0)"]
28 pub emr0: EMR0,
29 _reserved13: [u8; 0x0c],
30 #[doc = "0x40 - Channel Control Register (channel = 1)"]
31 pub ccr1: CCR1,
32 _reserved_14_cmr1: [u8; 0x04],
33 #[doc = "0x48 - Stepper Motor Mode Register (channel = 1)"]
34 pub smmr1: SMMR1,
35 #[doc = "0x4c - Register AB (channel = 1)"]
36 pub rab1: RAB1,
37 #[doc = "0x50 - Counter Value (channel = 1)"]
38 pub cv1: CV1,
39 #[doc = "0x54 - Register A (channel = 1)"]
40 pub ra1: RA1,
41 #[doc = "0x58 - Register B (channel = 1)"]
42 pub rb1: RB1,
43 #[doc = "0x5c - Register C (channel = 1)"]
44 pub rc1: RC1,
45 #[doc = "0x60 - Status Register (channel = 1)"]
46 pub sr1: SR1,
47 #[doc = "0x64 - Interrupt Enable Register (channel = 1)"]
48 pub ier1: IER1,
49 #[doc = "0x68 - Interrupt Disable Register (channel = 1)"]
50 pub idr1: IDR1,
51 #[doc = "0x6c - Interrupt Mask Register (channel = 1)"]
52 pub imr1: IMR1,
53 #[doc = "0x70 - Extended Mode Register (channel = 1)"]
54 pub emr1: EMR1,
55 _reserved26: [u8; 0x0c],
56 #[doc = "0x80 - Channel Control Register (channel = 2)"]
57 pub ccr2: CCR2,
58 _reserved_27_cmr2: [u8; 0x04],
59 #[doc = "0x88 - Stepper Motor Mode Register (channel = 2)"]
60 pub smmr2: SMMR2,
61 #[doc = "0x8c - Register AB (channel = 2)"]
62 pub rab2: RAB2,
63 #[doc = "0x90 - Counter Value (channel = 2)"]
64 pub cv2: CV2,
65 #[doc = "0x94 - Register A (channel = 2)"]
66 pub ra2: RA2,
67 #[doc = "0x98 - Register B (channel = 2)"]
68 pub rb2: RB2,
69 #[doc = "0x9c - Register C (channel = 2)"]
70 pub rc2: RC2,
71 #[doc = "0xa0 - Status Register (channel = 2)"]
72 pub sr2: SR2,
73 #[doc = "0xa4 - Interrupt Enable Register (channel = 2)"]
74 pub ier2: IER2,
75 #[doc = "0xa8 - Interrupt Disable Register (channel = 2)"]
76 pub idr2: IDR2,
77 #[doc = "0xac - Interrupt Mask Register (channel = 2)"]
78 pub imr2: IMR2,
79 #[doc = "0xb0 - Extended Mode Register (channel = 2)"]
80 pub emr2: EMR2,
81 _reserved39: [u8; 0x0c],
82 #[doc = "0xc0 - Block Control Register"]
83 pub bcr: BCR,
84 #[doc = "0xc4 - Block Mode Register"]
85 pub bmr: BMR,
86 #[doc = "0xc8 - QDEC Interrupt Enable Register"]
87 pub qier: QIER,
88 #[doc = "0xcc - QDEC Interrupt Disable Register"]
89 pub qidr: QIDR,
90 #[doc = "0xd0 - QDEC Interrupt Mask Register"]
91 pub qimr: QIMR,
92 #[doc = "0xd4 - QDEC Interrupt Status Register"]
93 pub qisr: QISR,
94 #[doc = "0xd8 - Fault Mode Register"]
95 pub fmr: FMR,
96 _reserved46: [u8; 0x08],
97 #[doc = "0xe4 - Write Protection Mode Register"]
98 pub wpmr: WPMR,
99 _reserved47: [u8; 0x18],
100 #[doc = "0x100 - Receive Pointer Register (pdc = 0)"]
101 pub rpr0: RPR0,
102 #[doc = "0x104 - Receive Counter Register (pdc = 0)"]
103 pub rcr0: RCR0,
104 _reserved49: [u8; 0x08],
105 #[doc = "0x110 - Receive Next Pointer Register (pdc = 0)"]
106 pub rnpr0: RNPR0,
107 #[doc = "0x114 - Receive Next Counter Register (pdc = 0)"]
108 pub rncr0: RNCR0,
109 _reserved51: [u8; 0x08],
110 #[doc = "0x120 - Transfer Control Register (pdc = 0)"]
111 pub ptcr0: PTCR0,
112 #[doc = "0x124 - Transfer Status Register (pdc = 0)"]
113 pub ptsr0: PTSR0,
114 _reserved53: [u8; 0x18],
115 #[doc = "0x140 - Receive Pointer Register (pdc = 1)"]
116 pub rpr1: RPR1,
117 #[doc = "0x144 - Receive Counter Register (pdc = 1)"]
118 pub rcr1: RCR1,
119 _reserved55: [u8; 0x08],
120 #[doc = "0x150 - Receive Next Pointer Register (pdc = 1)"]
121 pub rnpr1: RNPR1,
122 #[doc = "0x154 - Receive Next Counter Register (pdc = 1)"]
123 pub rncr1: RNCR1,
124 _reserved57: [u8; 0x08],
125 #[doc = "0x160 - Transfer Control Register (pdc = 1)"]
126 pub ptcr1: PTCR1,
127 #[doc = "0x164 - Transfer Status Register (pdc = 1)"]
128 pub ptsr1: PTSR1,
129 _reserved59: [u8; 0x18],
130 #[doc = "0x180 - Receive Pointer Register (pdc = 2)"]
131 pub rpr2: RPR2,
132 #[doc = "0x184 - Receive Counter Register (pdc = 2)"]
133 pub rcr2: RCR2,
134 _reserved61: [u8; 0x08],
135 #[doc = "0x190 - Receive Next Pointer Register (pdc = 2)"]
136 pub rnpr2: RNPR2,
137 #[doc = "0x194 - Receive Next Counter Register (pdc = 2)"]
138 pub rncr2: RNCR2,
139 _reserved63: [u8; 0x08],
140 #[doc = "0x1a0 - Transfer Control Register (pdc = 2)"]
141 pub ptcr2: PTCR2,
142 #[doc = "0x1a4 - Transfer Status Register (pdc = 2)"]
143 pub ptsr2: PTSR2,
144}
145impl RegisterBlock {
146 #[doc = "0x04 - Channel Mode Register (channel = 0)"]
147 #[inline(always)]
148 pub const fn wave_eq_1_cmr0_wave_eq_1(&self) -> &WAVE_EQ_1_CMR0_WAVE_EQ_1 {
149 unsafe { &*(self as *const Self).cast::<u8>().add(4usize).cast() }
150 }
151 #[doc = "0x04 - Channel Mode Register (channel = 0)"]
152 #[inline(always)]
153 pub const fn cmr0(&self) -> &CMR0 {
154 unsafe { &*(self as *const Self).cast::<u8>().add(4usize).cast() }
155 }
156 #[doc = "0x44 - Channel Mode Register (channel = 1)"]
157 #[inline(always)]
158 pub const fn wave_eq_1_cmr1_wave_eq_1(&self) -> &WAVE_EQ_1_CMR1_WAVE_EQ_1 {
159 unsafe { &*(self as *const Self).cast::<u8>().add(68usize).cast() }
160 }
161 #[doc = "0x44 - Channel Mode Register (channel = 1)"]
162 #[inline(always)]
163 pub const fn cmr1(&self) -> &CMR1 {
164 unsafe { &*(self as *const Self).cast::<u8>().add(68usize).cast() }
165 }
166 #[doc = "0x84 - Channel Mode Register (channel = 2)"]
167 #[inline(always)]
168 pub const fn wave_eq_1_cmr2_wave_eq_1(&self) -> &WAVE_EQ_1_CMR2_WAVE_EQ_1 {
169 unsafe { &*(self as *const Self).cast::<u8>().add(132usize).cast() }
170 }
171 #[doc = "0x84 - Channel Mode Register (channel = 2)"]
172 #[inline(always)]
173 pub const fn cmr2(&self) -> &CMR2 {
174 unsafe { &*(self as *const Self).cast::<u8>().add(132usize).cast() }
175 }
176}
177#[doc = "CCR0 (w) register accessor: an alias for `Reg<CCR0_SPEC>`"]
178pub type CCR0 = crate::Reg<ccr0::CCR0_SPEC>;
179#[doc = "Channel Control Register (channel = 0)"]
180pub mod ccr0;
181#[doc = "CMR0 (rw) register accessor: an alias for `Reg<CMR0_SPEC>`"]
182pub type CMR0 = crate::Reg<cmr0::CMR0_SPEC>;
183#[doc = "Channel Mode Register (channel = 0)"]
184pub mod cmr0;
185#[doc = "WAVE_EQ_1_CMR0_WAVE_EQ_1 (rw) register accessor: an alias for `Reg<WAVE_EQ_1_CMR0_WAVE_EQ_1_SPEC>`"]
186pub type WAVE_EQ_1_CMR0_WAVE_EQ_1 =
187 crate::Reg<wave_eq_1_cmr0_wave_eq_1::WAVE_EQ_1_CMR0_WAVE_EQ_1_SPEC>;
188#[doc = "Channel Mode Register (channel = 0)"]
189pub mod wave_eq_1_cmr0_wave_eq_1;
190#[doc = "SMMR0 (rw) register accessor: an alias for `Reg<SMMR0_SPEC>`"]
191pub type SMMR0 = crate::Reg<smmr0::SMMR0_SPEC>;
192#[doc = "Stepper Motor Mode Register (channel = 0)"]
193pub mod smmr0;
194#[doc = "RAB0 (r) register accessor: an alias for `Reg<RAB0_SPEC>`"]
195pub type RAB0 = crate::Reg<rab0::RAB0_SPEC>;
196#[doc = "Register AB (channel = 0)"]
197pub mod rab0;
198#[doc = "CV0 (r) register accessor: an alias for `Reg<CV0_SPEC>`"]
199pub type CV0 = crate::Reg<cv0::CV0_SPEC>;
200#[doc = "Counter Value (channel = 0)"]
201pub mod cv0;
202#[doc = "RA0 (rw) register accessor: an alias for `Reg<RA0_SPEC>`"]
203pub type RA0 = crate::Reg<ra0::RA0_SPEC>;
204#[doc = "Register A (channel = 0)"]
205pub mod ra0;
206#[doc = "RB0 (rw) register accessor: an alias for `Reg<RB0_SPEC>`"]
207pub type RB0 = crate::Reg<rb0::RB0_SPEC>;
208#[doc = "Register B (channel = 0)"]
209pub mod rb0;
210#[doc = "RC0 (rw) register accessor: an alias for `Reg<RC0_SPEC>`"]
211pub type RC0 = crate::Reg<rc0::RC0_SPEC>;
212#[doc = "Register C (channel = 0)"]
213pub mod rc0;
214#[doc = "SR0 (r) register accessor: an alias for `Reg<SR0_SPEC>`"]
215pub type SR0 = crate::Reg<sr0::SR0_SPEC>;
216#[doc = "Status Register (channel = 0)"]
217pub mod sr0;
218#[doc = "IER0 (w) register accessor: an alias for `Reg<IER0_SPEC>`"]
219pub type IER0 = crate::Reg<ier0::IER0_SPEC>;
220#[doc = "Interrupt Enable Register (channel = 0)"]
221pub mod ier0;
222#[doc = "IDR0 (w) register accessor: an alias for `Reg<IDR0_SPEC>`"]
223pub type IDR0 = crate::Reg<idr0::IDR0_SPEC>;
224#[doc = "Interrupt Disable Register (channel = 0)"]
225pub mod idr0;
226#[doc = "IMR0 (r) register accessor: an alias for `Reg<IMR0_SPEC>`"]
227pub type IMR0 = crate::Reg<imr0::IMR0_SPEC>;
228#[doc = "Interrupt Mask Register (channel = 0)"]
229pub mod imr0;
230#[doc = "EMR0 (rw) register accessor: an alias for `Reg<EMR0_SPEC>`"]
231pub type EMR0 = crate::Reg<emr0::EMR0_SPEC>;
232#[doc = "Extended Mode Register (channel = 0)"]
233pub mod emr0;
234#[doc = "CCR1 (w) register accessor: an alias for `Reg<CCR1_SPEC>`"]
235pub type CCR1 = crate::Reg<ccr1::CCR1_SPEC>;
236#[doc = "Channel Control Register (channel = 1)"]
237pub mod ccr1;
238#[doc = "CMR1 (rw) register accessor: an alias for `Reg<CMR1_SPEC>`"]
239pub type CMR1 = crate::Reg<cmr1::CMR1_SPEC>;
240#[doc = "Channel Mode Register (channel = 1)"]
241pub mod cmr1;
242#[doc = "WAVE_EQ_1_CMR1_WAVE_EQ_1 (rw) register accessor: an alias for `Reg<WAVE_EQ_1_CMR1_WAVE_EQ_1_SPEC>`"]
243pub type WAVE_EQ_1_CMR1_WAVE_EQ_1 =
244 crate::Reg<wave_eq_1_cmr1_wave_eq_1::WAVE_EQ_1_CMR1_WAVE_EQ_1_SPEC>;
245#[doc = "Channel Mode Register (channel = 1)"]
246pub mod wave_eq_1_cmr1_wave_eq_1;
247#[doc = "SMMR1 (rw) register accessor: an alias for `Reg<SMMR1_SPEC>`"]
248pub type SMMR1 = crate::Reg<smmr1::SMMR1_SPEC>;
249#[doc = "Stepper Motor Mode Register (channel = 1)"]
250pub mod smmr1;
251#[doc = "RAB1 (r) register accessor: an alias for `Reg<RAB1_SPEC>`"]
252pub type RAB1 = crate::Reg<rab1::RAB1_SPEC>;
253#[doc = "Register AB (channel = 1)"]
254pub mod rab1;
255#[doc = "CV1 (r) register accessor: an alias for `Reg<CV1_SPEC>`"]
256pub type CV1 = crate::Reg<cv1::CV1_SPEC>;
257#[doc = "Counter Value (channel = 1)"]
258pub mod cv1;
259#[doc = "RA1 (rw) register accessor: an alias for `Reg<RA1_SPEC>`"]
260pub type RA1 = crate::Reg<ra1::RA1_SPEC>;
261#[doc = "Register A (channel = 1)"]
262pub mod ra1;
263#[doc = "RB1 (rw) register accessor: an alias for `Reg<RB1_SPEC>`"]
264pub type RB1 = crate::Reg<rb1::RB1_SPEC>;
265#[doc = "Register B (channel = 1)"]
266pub mod rb1;
267#[doc = "RC1 (rw) register accessor: an alias for `Reg<RC1_SPEC>`"]
268pub type RC1 = crate::Reg<rc1::RC1_SPEC>;
269#[doc = "Register C (channel = 1)"]
270pub mod rc1;
271#[doc = "SR1 (r) register accessor: an alias for `Reg<SR1_SPEC>`"]
272pub type SR1 = crate::Reg<sr1::SR1_SPEC>;
273#[doc = "Status Register (channel = 1)"]
274pub mod sr1;
275#[doc = "IER1 (w) register accessor: an alias for `Reg<IER1_SPEC>`"]
276pub type IER1 = crate::Reg<ier1::IER1_SPEC>;
277#[doc = "Interrupt Enable Register (channel = 1)"]
278pub mod ier1;
279#[doc = "IDR1 (w) register accessor: an alias for `Reg<IDR1_SPEC>`"]
280pub type IDR1 = crate::Reg<idr1::IDR1_SPEC>;
281#[doc = "Interrupt Disable Register (channel = 1)"]
282pub mod idr1;
283#[doc = "IMR1 (r) register accessor: an alias for `Reg<IMR1_SPEC>`"]
284pub type IMR1 = crate::Reg<imr1::IMR1_SPEC>;
285#[doc = "Interrupt Mask Register (channel = 1)"]
286pub mod imr1;
287#[doc = "EMR1 (rw) register accessor: an alias for `Reg<EMR1_SPEC>`"]
288pub type EMR1 = crate::Reg<emr1::EMR1_SPEC>;
289#[doc = "Extended Mode Register (channel = 1)"]
290pub mod emr1;
291#[doc = "CCR2 (w) register accessor: an alias for `Reg<CCR2_SPEC>`"]
292pub type CCR2 = crate::Reg<ccr2::CCR2_SPEC>;
293#[doc = "Channel Control Register (channel = 2)"]
294pub mod ccr2;
295#[doc = "CMR2 (rw) register accessor: an alias for `Reg<CMR2_SPEC>`"]
296pub type CMR2 = crate::Reg<cmr2::CMR2_SPEC>;
297#[doc = "Channel Mode Register (channel = 2)"]
298pub mod cmr2;
299#[doc = "WAVE_EQ_1_CMR2_WAVE_EQ_1 (rw) register accessor: an alias for `Reg<WAVE_EQ_1_CMR2_WAVE_EQ_1_SPEC>`"]
300pub type WAVE_EQ_1_CMR2_WAVE_EQ_1 =
301 crate::Reg<wave_eq_1_cmr2_wave_eq_1::WAVE_EQ_1_CMR2_WAVE_EQ_1_SPEC>;
302#[doc = "Channel Mode Register (channel = 2)"]
303pub mod wave_eq_1_cmr2_wave_eq_1;
304#[doc = "SMMR2 (rw) register accessor: an alias for `Reg<SMMR2_SPEC>`"]
305pub type SMMR2 = crate::Reg<smmr2::SMMR2_SPEC>;
306#[doc = "Stepper Motor Mode Register (channel = 2)"]
307pub mod smmr2;
308#[doc = "RAB2 (r) register accessor: an alias for `Reg<RAB2_SPEC>`"]
309pub type RAB2 = crate::Reg<rab2::RAB2_SPEC>;
310#[doc = "Register AB (channel = 2)"]
311pub mod rab2;
312#[doc = "CV2 (r) register accessor: an alias for `Reg<CV2_SPEC>`"]
313pub type CV2 = crate::Reg<cv2::CV2_SPEC>;
314#[doc = "Counter Value (channel = 2)"]
315pub mod cv2;
316#[doc = "RA2 (rw) register accessor: an alias for `Reg<RA2_SPEC>`"]
317pub type RA2 = crate::Reg<ra2::RA2_SPEC>;
318#[doc = "Register A (channel = 2)"]
319pub mod ra2;
320#[doc = "RB2 (rw) register accessor: an alias for `Reg<RB2_SPEC>`"]
321pub type RB2 = crate::Reg<rb2::RB2_SPEC>;
322#[doc = "Register B (channel = 2)"]
323pub mod rb2;
324#[doc = "RC2 (rw) register accessor: an alias for `Reg<RC2_SPEC>`"]
325pub type RC2 = crate::Reg<rc2::RC2_SPEC>;
326#[doc = "Register C (channel = 2)"]
327pub mod rc2;
328#[doc = "SR2 (r) register accessor: an alias for `Reg<SR2_SPEC>`"]
329pub type SR2 = crate::Reg<sr2::SR2_SPEC>;
330#[doc = "Status Register (channel = 2)"]
331pub mod sr2;
332#[doc = "IER2 (w) register accessor: an alias for `Reg<IER2_SPEC>`"]
333pub type IER2 = crate::Reg<ier2::IER2_SPEC>;
334#[doc = "Interrupt Enable Register (channel = 2)"]
335pub mod ier2;
336#[doc = "IDR2 (w) register accessor: an alias for `Reg<IDR2_SPEC>`"]
337pub type IDR2 = crate::Reg<idr2::IDR2_SPEC>;
338#[doc = "Interrupt Disable Register (channel = 2)"]
339pub mod idr2;
340#[doc = "IMR2 (r) register accessor: an alias for `Reg<IMR2_SPEC>`"]
341pub type IMR2 = crate::Reg<imr2::IMR2_SPEC>;
342#[doc = "Interrupt Mask Register (channel = 2)"]
343pub mod imr2;
344#[doc = "EMR2 (rw) register accessor: an alias for `Reg<EMR2_SPEC>`"]
345pub type EMR2 = crate::Reg<emr2::EMR2_SPEC>;
346#[doc = "Extended Mode Register (channel = 2)"]
347pub mod emr2;
348#[doc = "BCR (w) register accessor: an alias for `Reg<BCR_SPEC>`"]
349pub type BCR = crate::Reg<bcr::BCR_SPEC>;
350#[doc = "Block Control Register"]
351pub mod bcr;
352#[doc = "BMR (rw) register accessor: an alias for `Reg<BMR_SPEC>`"]
353pub type BMR = crate::Reg<bmr::BMR_SPEC>;
354#[doc = "Block Mode Register"]
355pub mod bmr;
356#[doc = "QIER (w) register accessor: an alias for `Reg<QIER_SPEC>`"]
357pub type QIER = crate::Reg<qier::QIER_SPEC>;
358#[doc = "QDEC Interrupt Enable Register"]
359pub mod qier;
360#[doc = "QIDR (w) register accessor: an alias for `Reg<QIDR_SPEC>`"]
361pub type QIDR = crate::Reg<qidr::QIDR_SPEC>;
362#[doc = "QDEC Interrupt Disable Register"]
363pub mod qidr;
364#[doc = "QIMR (r) register accessor: an alias for `Reg<QIMR_SPEC>`"]
365pub type QIMR = crate::Reg<qimr::QIMR_SPEC>;
366#[doc = "QDEC Interrupt Mask Register"]
367pub mod qimr;
368#[doc = "QISR (r) register accessor: an alias for `Reg<QISR_SPEC>`"]
369pub type QISR = crate::Reg<qisr::QISR_SPEC>;
370#[doc = "QDEC Interrupt Status Register"]
371pub mod qisr;
372#[doc = "FMR (rw) register accessor: an alias for `Reg<FMR_SPEC>`"]
373pub type FMR = crate::Reg<fmr::FMR_SPEC>;
374#[doc = "Fault Mode Register"]
375pub mod fmr;
376#[doc = "WPMR (rw) register accessor: an alias for `Reg<WPMR_SPEC>`"]
377pub type WPMR = crate::Reg<wpmr::WPMR_SPEC>;
378#[doc = "Write Protection Mode Register"]
379pub mod wpmr;
380#[doc = "RPR0 (rw) register accessor: an alias for `Reg<RPR0_SPEC>`"]
381pub type RPR0 = crate::Reg<rpr0::RPR0_SPEC>;
382#[doc = "Receive Pointer Register (pdc = 0)"]
383pub mod rpr0;
384#[doc = "RCR0 (rw) register accessor: an alias for `Reg<RCR0_SPEC>`"]
385pub type RCR0 = crate::Reg<rcr0::RCR0_SPEC>;
386#[doc = "Receive Counter Register (pdc = 0)"]
387pub mod rcr0;
388#[doc = "RNPR0 (rw) register accessor: an alias for `Reg<RNPR0_SPEC>`"]
389pub type RNPR0 = crate::Reg<rnpr0::RNPR0_SPEC>;
390#[doc = "Receive Next Pointer Register (pdc = 0)"]
391pub mod rnpr0;
392#[doc = "RNCR0 (rw) register accessor: an alias for `Reg<RNCR0_SPEC>`"]
393pub type RNCR0 = crate::Reg<rncr0::RNCR0_SPEC>;
394#[doc = "Receive Next Counter Register (pdc = 0)"]
395pub mod rncr0;
396#[doc = "PTCR0 (w) register accessor: an alias for `Reg<PTCR0_SPEC>`"]
397pub type PTCR0 = crate::Reg<ptcr0::PTCR0_SPEC>;
398#[doc = "Transfer Control Register (pdc = 0)"]
399pub mod ptcr0;
400#[doc = "PTSR0 (r) register accessor: an alias for `Reg<PTSR0_SPEC>`"]
401pub type PTSR0 = crate::Reg<ptsr0::PTSR0_SPEC>;
402#[doc = "Transfer Status Register (pdc = 0)"]
403pub mod ptsr0;
404#[doc = "RPR1 (rw) register accessor: an alias for `Reg<RPR1_SPEC>`"]
405pub type RPR1 = crate::Reg<rpr1::RPR1_SPEC>;
406#[doc = "Receive Pointer Register (pdc = 1)"]
407pub mod rpr1;
408#[doc = "RCR1 (rw) register accessor: an alias for `Reg<RCR1_SPEC>`"]
409pub type RCR1 = crate::Reg<rcr1::RCR1_SPEC>;
410#[doc = "Receive Counter Register (pdc = 1)"]
411pub mod rcr1;
412#[doc = "RNPR1 (rw) register accessor: an alias for `Reg<RNPR1_SPEC>`"]
413pub type RNPR1 = crate::Reg<rnpr1::RNPR1_SPEC>;
414#[doc = "Receive Next Pointer Register (pdc = 1)"]
415pub mod rnpr1;
416#[doc = "RNCR1 (rw) register accessor: an alias for `Reg<RNCR1_SPEC>`"]
417pub type RNCR1 = crate::Reg<rncr1::RNCR1_SPEC>;
418#[doc = "Receive Next Counter Register (pdc = 1)"]
419pub mod rncr1;
420#[doc = "PTCR1 (w) register accessor: an alias for `Reg<PTCR1_SPEC>`"]
421pub type PTCR1 = crate::Reg<ptcr1::PTCR1_SPEC>;
422#[doc = "Transfer Control Register (pdc = 1)"]
423pub mod ptcr1;
424#[doc = "PTSR1 (r) register accessor: an alias for `Reg<PTSR1_SPEC>`"]
425pub type PTSR1 = crate::Reg<ptsr1::PTSR1_SPEC>;
426#[doc = "Transfer Status Register (pdc = 1)"]
427pub mod ptsr1;
428#[doc = "RPR2 (rw) register accessor: an alias for `Reg<RPR2_SPEC>`"]
429pub type RPR2 = crate::Reg<rpr2::RPR2_SPEC>;
430#[doc = "Receive Pointer Register (pdc = 2)"]
431pub mod rpr2;
432#[doc = "RCR2 (rw) register accessor: an alias for `Reg<RCR2_SPEC>`"]
433pub type RCR2 = crate::Reg<rcr2::RCR2_SPEC>;
434#[doc = "Receive Counter Register (pdc = 2)"]
435pub mod rcr2;
436#[doc = "RNPR2 (rw) register accessor: an alias for `Reg<RNPR2_SPEC>`"]
437pub type RNPR2 = crate::Reg<rnpr2::RNPR2_SPEC>;
438#[doc = "Receive Next Pointer Register (pdc = 2)"]
439pub mod rnpr2;
440#[doc = "RNCR2 (rw) register accessor: an alias for `Reg<RNCR2_SPEC>`"]
441pub type RNCR2 = crate::Reg<rncr2::RNCR2_SPEC>;
442#[doc = "Receive Next Counter Register (pdc = 2)"]
443pub mod rncr2;
444#[doc = "PTCR2 (w) register accessor: an alias for `Reg<PTCR2_SPEC>`"]
445pub type PTCR2 = crate::Reg<ptcr2::PTCR2_SPEC>;
446#[doc = "Transfer Control Register (pdc = 2)"]
447pub mod ptcr2;
448#[doc = "PTSR2 (r) register accessor: an alias for `Reg<PTSR2_SPEC>`"]
449pub type PTSR2 = crate::Reg<ptsr2::PTSR2_SPEC>;
450#[doc = "Transfer Status Register (pdc = 2)"]
451pub mod ptsr2;