atsam3x8h/usart2/
csr.rs

1#[doc = "Register `CSR` reader"]
2pub type R = crate::R<CsrSpec>;
3#[doc = "Field `RXRDY` reader - Receiver Ready"]
4pub type RxrdyR = crate::BitReader;
5#[doc = "Field `TXRDY` reader - Transmitter Ready"]
6pub type TxrdyR = crate::BitReader;
7#[doc = "Field `RXBRK` reader - Break Received/End of Break"]
8pub type RxbrkR = crate::BitReader;
9#[doc = "Field `ENDRX` reader - End of Receiver Transfer"]
10pub type EndrxR = crate::BitReader;
11#[doc = "Field `ENDTX` reader - End of Transmitter Transfer"]
12pub type EndtxR = crate::BitReader;
13#[doc = "Field `OVRE` reader - Overrun Error"]
14pub type OvreR = crate::BitReader;
15#[doc = "Field `FRAME` reader - Framing Error"]
16pub type FrameR = crate::BitReader;
17#[doc = "Field `PARE` reader - Parity Error"]
18pub type PareR = crate::BitReader;
19#[doc = "Field `TIMEOUT` reader - Receiver Time-out"]
20pub type TimeoutR = crate::BitReader;
21#[doc = "Field `TXEMPTY` reader - Transmitter Empty"]
22pub type TxemptyR = crate::BitReader;
23#[doc = "Field `ITER` reader - Max Number of Repetitions Reached"]
24pub type IterR = crate::BitReader;
25#[doc = "Field `TXBUFE` reader - Transmission Buffer Empty"]
26pub type TxbufeR = crate::BitReader;
27#[doc = "Field `RXBUFF` reader - Reception Buffer Full"]
28pub type RxbuffR = crate::BitReader;
29#[doc = "Field `NACK` reader - Non Acknowledge Interrupt"]
30pub type NackR = crate::BitReader;
31#[doc = "Field `CTSIC` reader - Clear to Send Input Change Flag"]
32pub type CtsicR = crate::BitReader;
33#[doc = "Field `CTS` reader - Image of CTS Input"]
34pub type CtsR = crate::BitReader;
35#[doc = "Field `MANERR` reader - Manchester Error"]
36pub type ManerrR = crate::BitReader;
37impl R {
38    #[doc = "Bit 0 - Receiver Ready"]
39    #[inline(always)]
40    pub fn rxrdy(&self) -> RxrdyR {
41        RxrdyR::new((self.bits & 1) != 0)
42    }
43    #[doc = "Bit 1 - Transmitter Ready"]
44    #[inline(always)]
45    pub fn txrdy(&self) -> TxrdyR {
46        TxrdyR::new(((self.bits >> 1) & 1) != 0)
47    }
48    #[doc = "Bit 2 - Break Received/End of Break"]
49    #[inline(always)]
50    pub fn rxbrk(&self) -> RxbrkR {
51        RxbrkR::new(((self.bits >> 2) & 1) != 0)
52    }
53    #[doc = "Bit 3 - End of Receiver Transfer"]
54    #[inline(always)]
55    pub fn endrx(&self) -> EndrxR {
56        EndrxR::new(((self.bits >> 3) & 1) != 0)
57    }
58    #[doc = "Bit 4 - End of Transmitter Transfer"]
59    #[inline(always)]
60    pub fn endtx(&self) -> EndtxR {
61        EndtxR::new(((self.bits >> 4) & 1) != 0)
62    }
63    #[doc = "Bit 5 - Overrun Error"]
64    #[inline(always)]
65    pub fn ovre(&self) -> OvreR {
66        OvreR::new(((self.bits >> 5) & 1) != 0)
67    }
68    #[doc = "Bit 6 - Framing Error"]
69    #[inline(always)]
70    pub fn frame(&self) -> FrameR {
71        FrameR::new(((self.bits >> 6) & 1) != 0)
72    }
73    #[doc = "Bit 7 - Parity Error"]
74    #[inline(always)]
75    pub fn pare(&self) -> PareR {
76        PareR::new(((self.bits >> 7) & 1) != 0)
77    }
78    #[doc = "Bit 8 - Receiver Time-out"]
79    #[inline(always)]
80    pub fn timeout(&self) -> TimeoutR {
81        TimeoutR::new(((self.bits >> 8) & 1) != 0)
82    }
83    #[doc = "Bit 9 - Transmitter Empty"]
84    #[inline(always)]
85    pub fn txempty(&self) -> TxemptyR {
86        TxemptyR::new(((self.bits >> 9) & 1) != 0)
87    }
88    #[doc = "Bit 10 - Max Number of Repetitions Reached"]
89    #[inline(always)]
90    pub fn iter(&self) -> IterR {
91        IterR::new(((self.bits >> 10) & 1) != 0)
92    }
93    #[doc = "Bit 11 - Transmission Buffer Empty"]
94    #[inline(always)]
95    pub fn txbufe(&self) -> TxbufeR {
96        TxbufeR::new(((self.bits >> 11) & 1) != 0)
97    }
98    #[doc = "Bit 12 - Reception Buffer Full"]
99    #[inline(always)]
100    pub fn rxbuff(&self) -> RxbuffR {
101        RxbuffR::new(((self.bits >> 12) & 1) != 0)
102    }
103    #[doc = "Bit 13 - Non Acknowledge Interrupt"]
104    #[inline(always)]
105    pub fn nack(&self) -> NackR {
106        NackR::new(((self.bits >> 13) & 1) != 0)
107    }
108    #[doc = "Bit 19 - Clear to Send Input Change Flag"]
109    #[inline(always)]
110    pub fn ctsic(&self) -> CtsicR {
111        CtsicR::new(((self.bits >> 19) & 1) != 0)
112    }
113    #[doc = "Bit 23 - Image of CTS Input"]
114    #[inline(always)]
115    pub fn cts(&self) -> CtsR {
116        CtsR::new(((self.bits >> 23) & 1) != 0)
117    }
118    #[doc = "Bit 24 - Manchester Error"]
119    #[inline(always)]
120    pub fn manerr(&self) -> ManerrR {
121        ManerrR::new(((self.bits >> 24) & 1) != 0)
122    }
123}
124#[doc = "Channel Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csr::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
125pub struct CsrSpec;
126impl crate::RegisterSpec for CsrSpec {
127    type Ux = u32;
128}
129#[doc = "`read()` method returns [`csr::R`](R) reader structure"]
130impl crate::Readable for CsrSpec {}
atsam3x8h/usart2/csr.rs

atsam3x8h/usart2/
csr.rs
