atsam3x4e/can0/
mid0.rs

1#[doc = "Register `MID0` reader"]
2pub type R = crate::R<Mid0Spec>;
3#[doc = "Register `MID0` writer"]
4pub type W = crate::W<Mid0Spec>;
5#[doc = "Field `MIDvB` reader - Complementary bits for identifier in extended frame mode"]
6pub type MidvBR = crate::FieldReader<u32>;
7#[doc = "Field `MIDvB` writer - Complementary bits for identifier in extended frame mode"]
8pub type MidvBW<'a, REG> = crate::FieldWriter<'a, REG, 18, u32>;
9#[doc = "Field `MIDvA` reader - Identifier for standard frame mode"]
10pub type MidvAR = crate::FieldReader<u16>;
11#[doc = "Field `MIDvA` writer - Identifier for standard frame mode"]
12pub type MidvAW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
13#[doc = "Field `MIDE` reader - Identifier Version"]
14pub type MideR = crate::BitReader;
15#[doc = "Field `MIDE` writer - Identifier Version"]
16pub type MideW<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bits 0:17 - Complementary bits for identifier in extended frame mode"]
19    #[inline(always)]
20    pub fn midv_b(&self) -> MidvBR {
21        MidvBR::new(self.bits & 0x0003_ffff)
22    }
23    #[doc = "Bits 18:28 - Identifier for standard frame mode"]
24    #[inline(always)]
25    pub fn midv_a(&self) -> MidvAR {
26        MidvAR::new(((self.bits >> 18) & 0x07ff) as u16)
27    }
28    #[doc = "Bit 29 - Identifier Version"]
29    #[inline(always)]
30    pub fn mide(&self) -> MideR {
31        MideR::new(((self.bits >> 29) & 1) != 0)
32    }
33}
34impl W {
35    #[doc = "Bits 0:17 - Complementary bits for identifier in extended frame mode"]
36    #[inline(always)]
37    #[must_use]
38    pub fn midv_b(&mut self) -> MidvBW<Mid0Spec> {
39        MidvBW::new(self, 0)
40    }
41    #[doc = "Bits 18:28 - Identifier for standard frame mode"]
42    #[inline(always)]
43    #[must_use]
44    pub fn midv_a(&mut self) -> MidvAW<Mid0Spec> {
45        MidvAW::new(self, 18)
46    }
47    #[doc = "Bit 29 - Identifier Version"]
48    #[inline(always)]
49    #[must_use]
50    pub fn mide(&mut self) -> MideW<Mid0Spec> {
51        MideW::new(self, 29)
52    }
53}
54#[doc = "Mailbox ID Register (MB = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mid0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mid0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
55pub struct Mid0Spec;
56impl crate::RegisterSpec for Mid0Spec {
57    type Ux = u32;
58}
59#[doc = "`read()` method returns [`mid0::R`](R) reader structure"]
60impl crate::Readable for Mid0Spec {}
61#[doc = "`write(|w| ..)` method takes [`mid0::W`](W) writer structure"]
62impl crate::Writable for Mid0Spec {
63    type Safety = crate::Unsafe;
64    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
65    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
66}
67#[doc = "`reset()` method sets MID0 to value 0"]
68impl crate::Resettable for Mid0Spec {
69    const RESET_VALUE: u32 = 0;
70}
atsam3x4e/can0/mid0.rs

atsam3x4e/can0/
mid0.rs
