atsam3s8c/dacc/
ier.rs

1#[doc = "Register `IER` writer"]
2pub type W = crate::W<IerSpec>;
3#[doc = "Field `TXRDY` writer - Transmit Ready Interrupt Enable"]
4pub type TxrdyW<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `EOC` writer - End of Conversion Interrupt Enable"]
6pub type EocW<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `ENDTX` writer - End of Transmit Buffer Interrupt Enable"]
8pub type EndtxW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `TXBUFE` writer - Transmit Buffer Empty Interrupt Enable"]
10pub type TxbufeW<'a, REG> = crate::BitWriter<'a, REG>;
11impl W {
12    #[doc = "Bit 0 - Transmit Ready Interrupt Enable"]
13    #[inline(always)]
14    #[must_use]
15    pub fn txrdy(&mut self) -> TxrdyW<IerSpec> {
16        TxrdyW::new(self, 0)
17    }
18    #[doc = "Bit 1 - End of Conversion Interrupt Enable"]
19    #[inline(always)]
20    #[must_use]
21    pub fn eoc(&mut self) -> EocW<IerSpec> {
22        EocW::new(self, 1)
23    }
24    #[doc = "Bit 2 - End of Transmit Buffer Interrupt Enable"]
25    #[inline(always)]
26    #[must_use]
27    pub fn endtx(&mut self) -> EndtxW<IerSpec> {
28        EndtxW::new(self, 2)
29    }
30    #[doc = "Bit 3 - Transmit Buffer Empty Interrupt Enable"]
31    #[inline(always)]
32    #[must_use]
33    pub fn txbufe(&mut self) -> TxbufeW<IerSpec> {
34        TxbufeW::new(self, 3)
35    }
36}
37#[doc = "Interrupt Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
38pub struct IerSpec;
39impl crate::RegisterSpec for IerSpec {
40    type Ux = u32;
41}
42#[doc = "`write(|w| ..)` method takes [`ier::W`](W) writer structure"]
43impl crate::Writable for IerSpec {
44    type Safety = crate::Unsafe;
45    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
46    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
47}
atsam3s8c/dacc/ier.rs

atsam3s8c/dacc/
ier.rs
