atsam3s8b/rtc/
idr.rs

1#[doc = "Register `IDR` writer"]
2pub type W = crate::W<IdrSpec>;
3#[doc = "Field `ACKDIS` writer - Acknowledge Update Interrupt Disable"]
4pub type AckdisW<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `ALRDIS` writer - Alarm Interrupt Disable"]
6pub type AlrdisW<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `SECDIS` writer - Second Event Interrupt Disable"]
8pub type SecdisW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `TIMDIS` writer - Time Event Interrupt Disable"]
10pub type TimdisW<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `CALDIS` writer - Calendar Event Interrupt Disable"]
12pub type CaldisW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `TDERRDIS` writer - Time and/or Date Error Interrupt Disable"]
14pub type TderrdisW<'a, REG> = crate::BitWriter<'a, REG>;
15impl W {
16    #[doc = "Bit 0 - Acknowledge Update Interrupt Disable"]
17    #[inline(always)]
18    #[must_use]
19    pub fn ackdis(&mut self) -> AckdisW<IdrSpec> {
20        AckdisW::new(self, 0)
21    }
22    #[doc = "Bit 1 - Alarm Interrupt Disable"]
23    #[inline(always)]
24    #[must_use]
25    pub fn alrdis(&mut self) -> AlrdisW<IdrSpec> {
26        AlrdisW::new(self, 1)
27    }
28    #[doc = "Bit 2 - Second Event Interrupt Disable"]
29    #[inline(always)]
30    #[must_use]
31    pub fn secdis(&mut self) -> SecdisW<IdrSpec> {
32        SecdisW::new(self, 2)
33    }
34    #[doc = "Bit 3 - Time Event Interrupt Disable"]
35    #[inline(always)]
36    #[must_use]
37    pub fn timdis(&mut self) -> TimdisW<IdrSpec> {
38        TimdisW::new(self, 3)
39    }
40    #[doc = "Bit 4 - Calendar Event Interrupt Disable"]
41    #[inline(always)]
42    #[must_use]
43    pub fn caldis(&mut self) -> CaldisW<IdrSpec> {
44        CaldisW::new(self, 4)
45    }
46    #[doc = "Bit 5 - Time and/or Date Error Interrupt Disable"]
47    #[inline(always)]
48    #[must_use]
49    pub fn tderrdis(&mut self) -> TderrdisW<IdrSpec> {
50        TderrdisW::new(self, 5)
51    }
52}
53#[doc = "Interrupt Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
54pub struct IdrSpec;
55impl crate::RegisterSpec for IdrSpec {
56    type Ux = u32;
57}
58#[doc = "`write(|w| ..)` method takes [`idr::W`](W) writer structure"]
59impl crate::Writable for IdrSpec {
60    type Safety = crate::Unsafe;
61    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
62    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
63}
atsam3s8b/rtc/idr.rs

atsam3s8b/rtc/
idr.rs
