atsam3s8b/pwm/
ier2.rs

1#[doc = "Register `IER2` writer"]
2pub type W = crate::W<Ier2Spec>;
3#[doc = "Field `WRDY` writer - Write Ready for Synchronous Channels Update Interrupt Enable"]
4pub type WrdyW<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `ENDTX` writer - PDC End of TX Buffer Interrupt Enable"]
6pub type EndtxW<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `TXBUFE` writer - PDC TX Buffer Empty Interrupt Enable"]
8pub type TxbufeW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `UNRE` writer - Synchronous Channels Update Underrun Error Interrupt Enable"]
10pub type UnreW<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `CMPM0` writer - Comparison 0 Match Interrupt Enable"]
12pub type Cmpm0W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CMPM1` writer - Comparison 1 Match Interrupt Enable"]
14pub type Cmpm1W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `CMPM2` writer - Comparison 2 Match Interrupt Enable"]
16pub type Cmpm2W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CMPM3` writer - Comparison 3 Match Interrupt Enable"]
18pub type Cmpm3W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `CMPM4` writer - Comparison 4 Match Interrupt Enable"]
20pub type Cmpm4W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `CMPM5` writer - Comparison 5 Match Interrupt Enable"]
22pub type Cmpm5W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `CMPM6` writer - Comparison 6 Match Interrupt Enable"]
24pub type Cmpm6W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `CMPM7` writer - Comparison 7 Match Interrupt Enable"]
26pub type Cmpm7W<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `CMPU0` writer - Comparison 0 Update Interrupt Enable"]
28pub type Cmpu0W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `CMPU1` writer - Comparison 1 Update Interrupt Enable"]
30pub type Cmpu1W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `CMPU2` writer - Comparison 2 Update Interrupt Enable"]
32pub type Cmpu2W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `CMPU3` writer - Comparison 3 Update Interrupt Enable"]
34pub type Cmpu3W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `CMPU4` writer - Comparison 4 Update Interrupt Enable"]
36pub type Cmpu4W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `CMPU5` writer - Comparison 5 Update Interrupt Enable"]
38pub type Cmpu5W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `CMPU6` writer - Comparison 6 Update Interrupt Enable"]
40pub type Cmpu6W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `CMPU7` writer - Comparison 7 Update Interrupt Enable"]
42pub type Cmpu7W<'a, REG> = crate::BitWriter<'a, REG>;
43impl W {
44    #[doc = "Bit 0 - Write Ready for Synchronous Channels Update Interrupt Enable"]
45    #[inline(always)]
46    #[must_use]
47    pub fn wrdy(&mut self) -> WrdyW<Ier2Spec> {
48        WrdyW::new(self, 0)
49    }
50    #[doc = "Bit 1 - PDC End of TX Buffer Interrupt Enable"]
51    #[inline(always)]
52    #[must_use]
53    pub fn endtx(&mut self) -> EndtxW<Ier2Spec> {
54        EndtxW::new(self, 1)
55    }
56    #[doc = "Bit 2 - PDC TX Buffer Empty Interrupt Enable"]
57    #[inline(always)]
58    #[must_use]
59    pub fn txbufe(&mut self) -> TxbufeW<Ier2Spec> {
60        TxbufeW::new(self, 2)
61    }
62    #[doc = "Bit 3 - Synchronous Channels Update Underrun Error Interrupt Enable"]
63    #[inline(always)]
64    #[must_use]
65    pub fn unre(&mut self) -> UnreW<Ier2Spec> {
66        UnreW::new(self, 3)
67    }
68    #[doc = "Bit 8 - Comparison 0 Match Interrupt Enable"]
69    #[inline(always)]
70    #[must_use]
71    pub fn cmpm0(&mut self) -> Cmpm0W<Ier2Spec> {
72        Cmpm0W::new(self, 8)
73    }
74    #[doc = "Bit 9 - Comparison 1 Match Interrupt Enable"]
75    #[inline(always)]
76    #[must_use]
77    pub fn cmpm1(&mut self) -> Cmpm1W<Ier2Spec> {
78        Cmpm1W::new(self, 9)
79    }
80    #[doc = "Bit 10 - Comparison 2 Match Interrupt Enable"]
81    #[inline(always)]
82    #[must_use]
83    pub fn cmpm2(&mut self) -> Cmpm2W<Ier2Spec> {
84        Cmpm2W::new(self, 10)
85    }
86    #[doc = "Bit 11 - Comparison 3 Match Interrupt Enable"]
87    #[inline(always)]
88    #[must_use]
89    pub fn cmpm3(&mut self) -> Cmpm3W<Ier2Spec> {
90        Cmpm3W::new(self, 11)
91    }
92    #[doc = "Bit 12 - Comparison 4 Match Interrupt Enable"]
93    #[inline(always)]
94    #[must_use]
95    pub fn cmpm4(&mut self) -> Cmpm4W<Ier2Spec> {
96        Cmpm4W::new(self, 12)
97    }
98    #[doc = "Bit 13 - Comparison 5 Match Interrupt Enable"]
99    #[inline(always)]
100    #[must_use]
101    pub fn cmpm5(&mut self) -> Cmpm5W<Ier2Spec> {
102        Cmpm5W::new(self, 13)
103    }
104    #[doc = "Bit 14 - Comparison 6 Match Interrupt Enable"]
105    #[inline(always)]
106    #[must_use]
107    pub fn cmpm6(&mut self) -> Cmpm6W<Ier2Spec> {
108        Cmpm6W::new(self, 14)
109    }
110    #[doc = "Bit 15 - Comparison 7 Match Interrupt Enable"]
111    #[inline(always)]
112    #[must_use]
113    pub fn cmpm7(&mut self) -> Cmpm7W<Ier2Spec> {
114        Cmpm7W::new(self, 15)
115    }
116    #[doc = "Bit 16 - Comparison 0 Update Interrupt Enable"]
117    #[inline(always)]
118    #[must_use]
119    pub fn cmpu0(&mut self) -> Cmpu0W<Ier2Spec> {
120        Cmpu0W::new(self, 16)
121    }
122    #[doc = "Bit 17 - Comparison 1 Update Interrupt Enable"]
123    #[inline(always)]
124    #[must_use]
125    pub fn cmpu1(&mut self) -> Cmpu1W<Ier2Spec> {
126        Cmpu1W::new(self, 17)
127    }
128    #[doc = "Bit 18 - Comparison 2 Update Interrupt Enable"]
129    #[inline(always)]
130    #[must_use]
131    pub fn cmpu2(&mut self) -> Cmpu2W<Ier2Spec> {
132        Cmpu2W::new(self, 18)
133    }
134    #[doc = "Bit 19 - Comparison 3 Update Interrupt Enable"]
135    #[inline(always)]
136    #[must_use]
137    pub fn cmpu3(&mut self) -> Cmpu3W<Ier2Spec> {
138        Cmpu3W::new(self, 19)
139    }
140    #[doc = "Bit 20 - Comparison 4 Update Interrupt Enable"]
141    #[inline(always)]
142    #[must_use]
143    pub fn cmpu4(&mut self) -> Cmpu4W<Ier2Spec> {
144        Cmpu4W::new(self, 20)
145    }
146    #[doc = "Bit 21 - Comparison 5 Update Interrupt Enable"]
147    #[inline(always)]
148    #[must_use]
149    pub fn cmpu5(&mut self) -> Cmpu5W<Ier2Spec> {
150        Cmpu5W::new(self, 21)
151    }
152    #[doc = "Bit 22 - Comparison 6 Update Interrupt Enable"]
153    #[inline(always)]
154    #[must_use]
155    pub fn cmpu6(&mut self) -> Cmpu6W<Ier2Spec> {
156        Cmpu6W::new(self, 22)
157    }
158    #[doc = "Bit 23 - Comparison 7 Update Interrupt Enable"]
159    #[inline(always)]
160    #[must_use]
161    pub fn cmpu7(&mut self) -> Cmpu7W<Ier2Spec> {
162        Cmpu7W::new(self, 23)
163    }
164}
165#[doc = "PWM Interrupt Enable Register 2\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
166pub struct Ier2Spec;
167impl crate::RegisterSpec for Ier2Spec {
168    type Ux = u32;
169}
170#[doc = "`write(|w| ..)` method takes [`ier2::W`](W) writer structure"]
171impl crate::Writable for Ier2Spec {
172    type Safety = crate::Unsafe;
173    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
174    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
175}