atsam3s8b/tc0/
ier1.rs

1#[doc = "Register `IER1` writer"]
2pub type W = crate::W<Ier1Spec>;
3#[doc = "Field `COVFS` writer - Counter Overflow"]
4pub type CovfsW<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `LOVRS` writer - Load Overrun"]
6pub type LovrsW<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `CPAS` writer - RA Compare"]
8pub type CpasW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CPBS` writer - RB Compare"]
10pub type CpbsW<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `CPCS` writer - RC Compare"]
12pub type CpcsW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `LDRAS` writer - RA Loading"]
14pub type LdrasW<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `LDRBS` writer - RB Loading"]
16pub type LdrbsW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ETRGS` writer - External Trigger"]
18pub type EtrgsW<'a, REG> = crate::BitWriter<'a, REG>;
19impl W {
20    #[doc = "Bit 0 - Counter Overflow"]
21    #[inline(always)]
22    #[must_use]
23    pub fn covfs(&mut self) -> CovfsW<Ier1Spec> {
24        CovfsW::new(self, 0)
25    }
26    #[doc = "Bit 1 - Load Overrun"]
27    #[inline(always)]
28    #[must_use]
29    pub fn lovrs(&mut self) -> LovrsW<Ier1Spec> {
30        LovrsW::new(self, 1)
31    }
32    #[doc = "Bit 2 - RA Compare"]
33    #[inline(always)]
34    #[must_use]
35    pub fn cpas(&mut self) -> CpasW<Ier1Spec> {
36        CpasW::new(self, 2)
37    }
38    #[doc = "Bit 3 - RB Compare"]
39    #[inline(always)]
40    #[must_use]
41    pub fn cpbs(&mut self) -> CpbsW<Ier1Spec> {
42        CpbsW::new(self, 3)
43    }
44    #[doc = "Bit 4 - RC Compare"]
45    #[inline(always)]
46    #[must_use]
47    pub fn cpcs(&mut self) -> CpcsW<Ier1Spec> {
48        CpcsW::new(self, 4)
49    }
50    #[doc = "Bit 5 - RA Loading"]
51    #[inline(always)]
52    #[must_use]
53    pub fn ldras(&mut self) -> LdrasW<Ier1Spec> {
54        LdrasW::new(self, 5)
55    }
56    #[doc = "Bit 6 - RB Loading"]
57    #[inline(always)]
58    #[must_use]
59    pub fn ldrbs(&mut self) -> LdrbsW<Ier1Spec> {
60        LdrbsW::new(self, 6)
61    }
62    #[doc = "Bit 7 - External Trigger"]
63    #[inline(always)]
64    #[must_use]
65    pub fn etrgs(&mut self) -> EtrgsW<Ier1Spec> {
66        EtrgsW::new(self, 7)
67    }
68}
69#[doc = "Interrupt Enable Register (channel = 1)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
70pub struct Ier1Spec;
71impl crate::RegisterSpec for Ier1Spec {
72    type Ux = u32;
73}
74#[doc = "`write(|w| ..)` method takes [`ier1::W`](W) writer structure"]
75impl crate::Writable for Ier1Spec {
76    type Safety = crate::Unsafe;
77    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
78    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
79}
atsam3s8b/tc0/ier1.rs

atsam3s8b/tc0/
ier1.rs
