atsam3s2a/ssc/
ier.rs

1#[doc = "Register `IER` writer"]
2pub type W = crate::W<IerSpec>;
3#[doc = "Field `TXRDY` writer - Transmit Ready Interrupt Enable"]
4pub type TxrdyW<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `TXEMPTY` writer - Transmit Empty Interrupt Enable"]
6pub type TxemptyW<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `ENDTX` writer - End of Transmission Interrupt Enable"]
8pub type EndtxW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `TXBUFE` writer - "]
10pub type TxbufeW<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `RXRDY` writer - Receive Ready Interrupt Enable"]
12pub type RxrdyW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `OVRUN` writer - Receive Overrun Interrupt Enable"]
14pub type OvrunW<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `ENDRX` writer - End of Reception Interrupt Enable"]
16pub type EndrxW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RXBUFF` writer - "]
18pub type RxbuffW<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `CP0` writer - Compare 0 Interrupt Enable"]
20pub type Cp0W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `CP1` writer - Compare 1 Interrupt Enable"]
22pub type Cp1W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `TXSYN` writer - Tx Sync Interrupt Enable"]
24pub type TxsynW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `RXSYN` writer - Rx Sync Interrupt Enable"]
26pub type RxsynW<'a, REG> = crate::BitWriter<'a, REG>;
27impl W {
28    #[doc = "Bit 0 - Transmit Ready Interrupt Enable"]
29    #[inline(always)]
30    #[must_use]
31    pub fn txrdy(&mut self) -> TxrdyW<IerSpec> {
32        TxrdyW::new(self, 0)
33    }
34    #[doc = "Bit 1 - Transmit Empty Interrupt Enable"]
35    #[inline(always)]
36    #[must_use]
37    pub fn txempty(&mut self) -> TxemptyW<IerSpec> {
38        TxemptyW::new(self, 1)
39    }
40    #[doc = "Bit 2 - End of Transmission Interrupt Enable"]
41    #[inline(always)]
42    #[must_use]
43    pub fn endtx(&mut self) -> EndtxW<IerSpec> {
44        EndtxW::new(self, 2)
45    }
46    #[doc = "Bit 3"]
47    #[inline(always)]
48    #[must_use]
49    pub fn txbufe(&mut self) -> TxbufeW<IerSpec> {
50        TxbufeW::new(self, 3)
51    }
52    #[doc = "Bit 4 - Receive Ready Interrupt Enable"]
53    #[inline(always)]
54    #[must_use]
55    pub fn rxrdy(&mut self) -> RxrdyW<IerSpec> {
56        RxrdyW::new(self, 4)
57    }
58    #[doc = "Bit 5 - Receive Overrun Interrupt Enable"]
59    #[inline(always)]
60    #[must_use]
61    pub fn ovrun(&mut self) -> OvrunW<IerSpec> {
62        OvrunW::new(self, 5)
63    }
64    #[doc = "Bit 6 - End of Reception Interrupt Enable"]
65    #[inline(always)]
66    #[must_use]
67    pub fn endrx(&mut self) -> EndrxW<IerSpec> {
68        EndrxW::new(self, 6)
69    }
70    #[doc = "Bit 7"]
71    #[inline(always)]
72    #[must_use]
73    pub fn rxbuff(&mut self) -> RxbuffW<IerSpec> {
74        RxbuffW::new(self, 7)
75    }
76    #[doc = "Bit 8 - Compare 0 Interrupt Enable"]
77    #[inline(always)]
78    #[must_use]
79    pub fn cp0(&mut self) -> Cp0W<IerSpec> {
80        Cp0W::new(self, 8)
81    }
82    #[doc = "Bit 9 - Compare 1 Interrupt Enable"]
83    #[inline(always)]
84    #[must_use]
85    pub fn cp1(&mut self) -> Cp1W<IerSpec> {
86        Cp1W::new(self, 9)
87    }
88    #[doc = "Bit 10 - Tx Sync Interrupt Enable"]
89    #[inline(always)]
90    #[must_use]
91    pub fn txsyn(&mut self) -> TxsynW<IerSpec> {
92        TxsynW::new(self, 10)
93    }
94    #[doc = "Bit 11 - Rx Sync Interrupt Enable"]
95    #[inline(always)]
96    #[must_use]
97    pub fn rxsyn(&mut self) -> RxsynW<IerSpec> {
98        RxsynW::new(self, 11)
99    }
100}
101#[doc = "Interrupt Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
102pub struct IerSpec;
103impl crate::RegisterSpec for IerSpec {
104    type Ux = u32;
105}
106#[doc = "`write(|w| ..)` method takes [`ier::W`](W) writer structure"]
107impl crate::Writable for IerSpec {
108    type Safety = crate::Unsafe;
109    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
110    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
111}
atsam3s2a/ssc/ier.rs

atsam3s2a/ssc/
ier.rs
