atsam3s1c/dacc/
isr.rs

1#[doc = "Register `ISR` reader"]
2pub type R = crate::R<IsrSpec>;
3#[doc = "Field `TXRDY` reader - Transmit Ready Interrupt Flag"]
4pub type TxrdyR = crate::BitReader;
5#[doc = "Field `EOC` reader - End of Conversion Interrupt Flag"]
6pub type EocR = crate::BitReader;
7#[doc = "Field `ENDTX` reader - End of DMA Interrupt Flag"]
8pub type EndtxR = crate::BitReader;
9#[doc = "Field `TXBUFE` reader - Transmit Buffer Empty"]
10pub type TxbufeR = crate::BitReader;
11impl R {
12    #[doc = "Bit 0 - Transmit Ready Interrupt Flag"]
13    #[inline(always)]
14    pub fn txrdy(&self) -> TxrdyR {
15        TxrdyR::new((self.bits & 1) != 0)
16    }
17    #[doc = "Bit 1 - End of Conversion Interrupt Flag"]
18    #[inline(always)]
19    pub fn eoc(&self) -> EocR {
20        EocR::new(((self.bits >> 1) & 1) != 0)
21    }
22    #[doc = "Bit 2 - End of DMA Interrupt Flag"]
23    #[inline(always)]
24    pub fn endtx(&self) -> EndtxR {
25        EndtxR::new(((self.bits >> 2) & 1) != 0)
26    }
27    #[doc = "Bit 3 - Transmit Buffer Empty"]
28    #[inline(always)]
29    pub fn txbufe(&self) -> TxbufeR {
30        TxbufeR::new(((self.bits >> 3) & 1) != 0)
31    }
32}
33#[doc = "Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`isr::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
34pub struct IsrSpec;
35impl crate::RegisterSpec for IsrSpec {
36    type Ux = u32;
37}
38#[doc = "`read()` method returns [`isr::R`](R) reader structure"]
39impl crate::Readable for IsrSpec {}
40#[doc = "`reset()` method sets ISR to value 0"]
41impl crate::Resettable for IsrSpec {
42    const RESET_VALUE: u32 = 0;
43}
atsam3s1c/dacc/isr.rs

atsam3s1c/dacc/
isr.rs
