atsam3s1c/hsmci/
fifo82.rs

1#[doc = "Register `FIFO82` reader"]
2pub type R = crate::R<Fifo82Spec>;
3#[doc = "Register `FIFO82` writer"]
4pub type W = crate::W<Fifo82Spec>;
5impl core::fmt::Debug for R {
6    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
7        write!(f, "{}", self.bits())
8    }
9}
10impl core::fmt::Debug for crate::generic::Reg<Fifo82Spec> {
11    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
12        core::fmt::Debug::fmt(&self.read(), f)
13    }
14}
15impl W {}
16#[doc = "FIFO Memory Aperture0 82\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo82::R`](R).  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo82::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
17pub struct Fifo82Spec;
18impl crate::RegisterSpec for Fifo82Spec {
19    type Ux = u32;
20}
21#[doc = "`read()` method returns [`fifo82::R`](R) reader structure"]
22impl crate::Readable for Fifo82Spec {}
23#[doc = "`write(|w| ..)` method takes [`fifo82::W`](W) writer structure"]
24impl crate::Writable for Fifo82Spec {
25    type Safety = crate::Unsafe;
26    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
27    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
28}
atsam3s1c/hsmci/fifo82.rs

atsam3s1c/hsmci/
fifo82.rs
