atsam3n00a/piob/
scdr.rs

1#[doc = "Register `SCDR` reader"]
2pub type R = crate::R<ScdrSpec>;
3#[doc = "Register `SCDR` writer"]
4pub type W = crate::W<ScdrSpec>;
5#[doc = "Field `DIV` reader - "]
6pub type DivR = crate::FieldReader<u16>;
7#[doc = "Field `DIV` writer - "]
8pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>;
9impl R {
10    #[doc = "Bits 0:13"]
11    #[inline(always)]
12    pub fn div(&self) -> DivR {
13        DivR::new((self.bits & 0x3fff) as u16)
14    }
15}
16impl W {
17    #[doc = "Bits 0:13"]
18    #[inline(always)]
19    #[must_use]
20    pub fn div(&mut self) -> DivW<ScdrSpec> {
21        DivW::new(self, 0)
22    }
23}
24#[doc = "Slow Clock Divider Debouncing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scdr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scdr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
25pub struct ScdrSpec;
26impl crate::RegisterSpec for ScdrSpec {
27    type Ux = u32;
28}
29#[doc = "`read()` method returns [`scdr::R`](R) reader structure"]
30impl crate::Readable for ScdrSpec {}
31#[doc = "`write(|w| ..)` method takes [`scdr::W`](W) writer structure"]
32impl crate::Writable for ScdrSpec {
33    type Safety = crate::Unsafe;
34    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
35    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
36}
37#[doc = "`reset()` method sets SCDR to value 0"]
38impl crate::Resettable for ScdrSpec {
39    const RESET_VALUE: u32 = 0;
40}
atsam3n00a/piob/scdr.rs

atsam3n00a/piob/
scdr.rs
