atsam3a8c/pwm/
ccnt0.rs

1#[doc = "Register `CCNT0` reader"]
2pub type R = crate::R<Ccnt0Spec>;
3#[doc = "Field `CNT` reader - Channel Counter Register"]
4pub type CntR = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:23 - Channel Counter Register"]
7    #[inline(always)]
8    pub fn cnt(&self) -> CntR {
9        CntR::new(self.bits & 0x00ff_ffff)
10    }
11}
12#[doc = "PWM Channel Counter Register (ch_num = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccnt0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
13pub struct Ccnt0Spec;
14impl crate::RegisterSpec for Ccnt0Spec {
15    type Ux = u32;
16}
17#[doc = "`read()` method returns [`ccnt0::R`](R) reader structure"]
18impl crate::Readable for Ccnt0Spec {}
19#[doc = "`reset()` method sets CCNT0 to value 0"]
20impl crate::Resettable for Ccnt0Spec {
21    const RESET_VALUE: u32 = 0;
22}