atsam3a4c/uotghs/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CtrlSpec>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CtrlSpec>;
5#[doc = "Field `IDTE` reader - ID Transition Interrupt Enable"]
6pub type IdteR = crate::BitReader;
7#[doc = "Field `IDTE` writer - ID Transition Interrupt Enable"]
8pub type IdteW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `VBUSTE` reader - VBus Transition Interrupt Enable"]
10pub type VbusteR = crate::BitReader;
11#[doc = "Field `VBUSTE` writer - VBus Transition Interrupt Enable"]
12pub type VbusteW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SRPE` reader - SRP Interrupt Enable"]
14pub type SrpeR = crate::BitReader;
15#[doc = "Field `SRPE` writer - SRP Interrupt Enable"]
16pub type SrpeW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `VBERRE` reader - VBus Error Interrupt Enable"]
18pub type VberreR = crate::BitReader;
19#[doc = "Field `VBERRE` writer - VBus Error Interrupt Enable"]
20pub type VberreW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BCERRE` reader - B-Connection Error Interrupt Enable"]
22pub type BcerreR = crate::BitReader;
23#[doc = "Field `BCERRE` writer - B-Connection Error Interrupt Enable"]
24pub type BcerreW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `ROLEEXE` reader - Role Exchange Interrupt Enable"]
26pub type RoleexeR = crate::BitReader;
27#[doc = "Field `ROLEEXE` writer - Role Exchange Interrupt Enable"]
28pub type RoleexeW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `HNPERRE` reader - HNP Error Interrupt Enable"]
30pub type HnperreR = crate::BitReader;
31#[doc = "Field `HNPERRE` writer - HNP Error Interrupt Enable"]
32pub type HnperreW<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `STOE` reader - Suspend Time-Out Interrupt Enable"]
34pub type StoeR = crate::BitReader;
35#[doc = "Field `STOE` writer - Suspend Time-Out Interrupt Enable"]
36pub type StoeW<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `VBUSHWC` reader - VBus Hardware Control"]
38pub type VbushwcR = crate::BitReader;
39#[doc = "Field `VBUSHWC` writer - VBus Hardware Control"]
40pub type VbushwcW<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `SRPSEL` reader - SRP Selection"]
42pub type SrpselR = crate::BitReader;
43#[doc = "Field `SRPSEL` writer - SRP Selection"]
44pub type SrpselW<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `SRPREQ` reader - SRP Request"]
46pub type SrpreqR = crate::BitReader;
47#[doc = "Field `SRPREQ` writer - SRP Request"]
48pub type SrpreqW<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `HNPREQ` reader - HNP Request"]
50pub type HnpreqR = crate::BitReader;
51#[doc = "Field `HNPREQ` writer - HNP Request"]
52pub type HnpreqW<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `OTGPADE` reader - OTG Pad Enable"]
54pub type OtgpadeR = crate::BitReader;
55#[doc = "Field `OTGPADE` writer - OTG Pad Enable"]
56pub type OtgpadeW<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `VBUSPO` reader - VBus Polarity Off"]
58pub type VbuspoR = crate::BitReader;
59#[doc = "Field `VBUSPO` writer - VBus Polarity Off"]
60pub type VbuspoW<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `FRZCLK` reader - Freeze USB Clock"]
62pub type FrzclkR = crate::BitReader;
63#[doc = "Field `FRZCLK` writer - Freeze USB Clock"]
64pub type FrzclkW<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `USBE` reader - UOTGHS Enable"]
66pub type UsbeR = crate::BitReader;
67#[doc = "Field `USBE` writer - UOTGHS Enable"]
68pub type UsbeW<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `TIMVALUE` reader - Timer Value"]
70pub type TimvalueR = crate::FieldReader;
71#[doc = "Field `TIMVALUE` writer - Timer Value"]
72pub type TimvalueW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
73#[doc = "Field `TIMPAGE` reader - Timer Page"]
74pub type TimpageR = crate::FieldReader;
75#[doc = "Field `TIMPAGE` writer - Timer Page"]
76pub type TimpageW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
77#[doc = "Field `UNLOCK` reader - Timer Access Unlock"]
78pub type UnlockR = crate::BitReader;
79#[doc = "Field `UNLOCK` writer - Timer Access Unlock"]
80pub type UnlockW<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "UOTGID Pin Enable\n\nValue on reset: 1"]
82#[derive(Clone, Copy, Debug, PartialEq, Eq)]
83pub enum Uide {
84    #[doc = "0: The USB mode (device/host) is selected from the UIMOD bit."]
85    Uimod = 0,
86    #[doc = "1: The USB mode (device/host) is selected from the UOTGID input pin."]
87    Uotgid = 1,
88}
89impl From<Uide> for bool {
90    #[inline(always)]
91    fn from(variant: Uide) -> Self {
92        variant as u8 != 0
93    }
94}
95#[doc = "Field `UIDE` reader - UOTGID Pin Enable"]
96pub type UideR = crate::BitReader<Uide>;
97impl UideR {
98    #[doc = "Get enumerated values variant"]
99    #[inline(always)]
100    pub const fn variant(&self) -> Uide {
101        match self.bits {
102            false => Uide::Uimod,
103            true => Uide::Uotgid,
104        }
105    }
106    #[doc = "The USB mode (device/host) is selected from the UIMOD bit."]
107    #[inline(always)]
108    pub fn is_uimod(&self) -> bool {
109        *self == Uide::Uimod
110    }
111    #[doc = "The USB mode (device/host) is selected from the UOTGID input pin."]
112    #[inline(always)]
113    pub fn is_uotgid(&self) -> bool {
114        *self == Uide::Uotgid
115    }
116}
117#[doc = "Field `UIDE` writer - UOTGID Pin Enable"]
118pub type UideW<'a, REG> = crate::BitWriter<'a, REG, Uide>;
119impl<'a, REG> UideW<'a, REG>
120where
121    REG: crate::Writable + crate::RegisterSpec,
122{
123    #[doc = "The USB mode (device/host) is selected from the UIMOD bit."]
124    #[inline(always)]
125    pub fn uimod(self) -> &'a mut crate::W<REG> {
126        self.variant(Uide::Uimod)
127    }
128    #[doc = "The USB mode (device/host) is selected from the UOTGID input pin."]
129    #[inline(always)]
130    pub fn uotgid(self) -> &'a mut crate::W<REG> {
131        self.variant(Uide::Uotgid)
132    }
133}
134#[doc = "UOTGHS Mode\n\nValue on reset: 1"]
135#[derive(Clone, Copy, Debug, PartialEq, Eq)]
136pub enum Uimod {
137    #[doc = "0: The module is in USB host mode."]
138    Host = 0,
139    #[doc = "1: The module is in USB device mode."]
140    Device = 1,
141}
142impl From<Uimod> for bool {
143    #[inline(always)]
144    fn from(variant: Uimod) -> Self {
145        variant as u8 != 0
146    }
147}
148#[doc = "Field `UIMOD` reader - UOTGHS Mode"]
149pub type UimodR = crate::BitReader<Uimod>;
150impl UimodR {
151    #[doc = "Get enumerated values variant"]
152    #[inline(always)]
153    pub const fn variant(&self) -> Uimod {
154        match self.bits {
155            false => Uimod::Host,
156            true => Uimod::Device,
157        }
158    }
159    #[doc = "The module is in USB host mode."]
160    #[inline(always)]
161    pub fn is_host(&self) -> bool {
162        *self == Uimod::Host
163    }
164    #[doc = "The module is in USB device mode."]
165    #[inline(always)]
166    pub fn is_device(&self) -> bool {
167        *self == Uimod::Device
168    }
169}
170#[doc = "Field `UIMOD` writer - UOTGHS Mode"]
171pub type UimodW<'a, REG> = crate::BitWriter<'a, REG, Uimod>;
172impl<'a, REG> UimodW<'a, REG>
173where
174    REG: crate::Writable + crate::RegisterSpec,
175{
176    #[doc = "The module is in USB host mode."]
177    #[inline(always)]
178    pub fn host(self) -> &'a mut crate::W<REG> {
179        self.variant(Uimod::Host)
180    }
181    #[doc = "The module is in USB device mode."]
182    #[inline(always)]
183    pub fn device(self) -> &'a mut crate::W<REG> {
184        self.variant(Uimod::Device)
185    }
186}
187impl R {
188    #[doc = "Bit 0 - ID Transition Interrupt Enable"]
189    #[inline(always)]
190    pub fn idte(&self) -> IdteR {
191        IdteR::new((self.bits & 1) != 0)
192    }
193    #[doc = "Bit 1 - VBus Transition Interrupt Enable"]
194    #[inline(always)]
195    pub fn vbuste(&self) -> VbusteR {
196        VbusteR::new(((self.bits >> 1) & 1) != 0)
197    }
198    #[doc = "Bit 2 - SRP Interrupt Enable"]
199    #[inline(always)]
200    pub fn srpe(&self) -> SrpeR {
201        SrpeR::new(((self.bits >> 2) & 1) != 0)
202    }
203    #[doc = "Bit 3 - VBus Error Interrupt Enable"]
204    #[inline(always)]
205    pub fn vberre(&self) -> VberreR {
206        VberreR::new(((self.bits >> 3) & 1) != 0)
207    }
208    #[doc = "Bit 4 - B-Connection Error Interrupt Enable"]
209    #[inline(always)]
210    pub fn bcerre(&self) -> BcerreR {
211        BcerreR::new(((self.bits >> 4) & 1) != 0)
212    }
213    #[doc = "Bit 5 - Role Exchange Interrupt Enable"]
214    #[inline(always)]
215    pub fn roleexe(&self) -> RoleexeR {
216        RoleexeR::new(((self.bits >> 5) & 1) != 0)
217    }
218    #[doc = "Bit 6 - HNP Error Interrupt Enable"]
219    #[inline(always)]
220    pub fn hnperre(&self) -> HnperreR {
221        HnperreR::new(((self.bits >> 6) & 1) != 0)
222    }
223    #[doc = "Bit 7 - Suspend Time-Out Interrupt Enable"]
224    #[inline(always)]
225    pub fn stoe(&self) -> StoeR {
226        StoeR::new(((self.bits >> 7) & 1) != 0)
227    }
228    #[doc = "Bit 8 - VBus Hardware Control"]
229    #[inline(always)]
230    pub fn vbushwc(&self) -> VbushwcR {
231        VbushwcR::new(((self.bits >> 8) & 1) != 0)
232    }
233    #[doc = "Bit 9 - SRP Selection"]
234    #[inline(always)]
235    pub fn srpsel(&self) -> SrpselR {
236        SrpselR::new(((self.bits >> 9) & 1) != 0)
237    }
238    #[doc = "Bit 10 - SRP Request"]
239    #[inline(always)]
240    pub fn srpreq(&self) -> SrpreqR {
241        SrpreqR::new(((self.bits >> 10) & 1) != 0)
242    }
243    #[doc = "Bit 11 - HNP Request"]
244    #[inline(always)]
245    pub fn hnpreq(&self) -> HnpreqR {
246        HnpreqR::new(((self.bits >> 11) & 1) != 0)
247    }
248    #[doc = "Bit 12 - OTG Pad Enable"]
249    #[inline(always)]
250    pub fn otgpade(&self) -> OtgpadeR {
251        OtgpadeR::new(((self.bits >> 12) & 1) != 0)
252    }
253    #[doc = "Bit 13 - VBus Polarity Off"]
254    #[inline(always)]
255    pub fn vbuspo(&self) -> VbuspoR {
256        VbuspoR::new(((self.bits >> 13) & 1) != 0)
257    }
258    #[doc = "Bit 14 - Freeze USB Clock"]
259    #[inline(always)]
260    pub fn frzclk(&self) -> FrzclkR {
261        FrzclkR::new(((self.bits >> 14) & 1) != 0)
262    }
263    #[doc = "Bit 15 - UOTGHS Enable"]
264    #[inline(always)]
265    pub fn usbe(&self) -> UsbeR {
266        UsbeR::new(((self.bits >> 15) & 1) != 0)
267    }
268    #[doc = "Bits 16:17 - Timer Value"]
269    #[inline(always)]
270    pub fn timvalue(&self) -> TimvalueR {
271        TimvalueR::new(((self.bits >> 16) & 3) as u8)
272    }
273    #[doc = "Bits 20:21 - Timer Page"]
274    #[inline(always)]
275    pub fn timpage(&self) -> TimpageR {
276        TimpageR::new(((self.bits >> 20) & 3) as u8)
277    }
278    #[doc = "Bit 22 - Timer Access Unlock"]
279    #[inline(always)]
280    pub fn unlock(&self) -> UnlockR {
281        UnlockR::new(((self.bits >> 22) & 1) != 0)
282    }
283    #[doc = "Bit 24 - UOTGID Pin Enable"]
284    #[inline(always)]
285    pub fn uide(&self) -> UideR {
286        UideR::new(((self.bits >> 24) & 1) != 0)
287    }
288    #[doc = "Bit 25 - UOTGHS Mode"]
289    #[inline(always)]
290    pub fn uimod(&self) -> UimodR {
291        UimodR::new(((self.bits >> 25) & 1) != 0)
292    }
293}
294impl W {
295    #[doc = "Bit 0 - ID Transition Interrupt Enable"]
296    #[inline(always)]
297    #[must_use]
298    pub fn idte(&mut self) -> IdteW<CtrlSpec> {
299        IdteW::new(self, 0)
300    }
301    #[doc = "Bit 1 - VBus Transition Interrupt Enable"]
302    #[inline(always)]
303    #[must_use]
304    pub fn vbuste(&mut self) -> VbusteW<CtrlSpec> {
305        VbusteW::new(self, 1)
306    }
307    #[doc = "Bit 2 - SRP Interrupt Enable"]
308    #[inline(always)]
309    #[must_use]
310    pub fn srpe(&mut self) -> SrpeW<CtrlSpec> {
311        SrpeW::new(self, 2)
312    }
313    #[doc = "Bit 3 - VBus Error Interrupt Enable"]
314    #[inline(always)]
315    #[must_use]
316    pub fn vberre(&mut self) -> VberreW<CtrlSpec> {
317        VberreW::new(self, 3)
318    }
319    #[doc = "Bit 4 - B-Connection Error Interrupt Enable"]
320    #[inline(always)]
321    #[must_use]
322    pub fn bcerre(&mut self) -> BcerreW<CtrlSpec> {
323        BcerreW::new(self, 4)
324    }
325    #[doc = "Bit 5 - Role Exchange Interrupt Enable"]
326    #[inline(always)]
327    #[must_use]
328    pub fn roleexe(&mut self) -> RoleexeW<CtrlSpec> {
329        RoleexeW::new(self, 5)
330    }
331    #[doc = "Bit 6 - HNP Error Interrupt Enable"]
332    #[inline(always)]
333    #[must_use]
334    pub fn hnperre(&mut self) -> HnperreW<CtrlSpec> {
335        HnperreW::new(self, 6)
336    }
337    #[doc = "Bit 7 - Suspend Time-Out Interrupt Enable"]
338    #[inline(always)]
339    #[must_use]
340    pub fn stoe(&mut self) -> StoeW<CtrlSpec> {
341        StoeW::new(self, 7)
342    }
343    #[doc = "Bit 8 - VBus Hardware Control"]
344    #[inline(always)]
345    #[must_use]
346    pub fn vbushwc(&mut self) -> VbushwcW<CtrlSpec> {
347        VbushwcW::new(self, 8)
348    }
349    #[doc = "Bit 9 - SRP Selection"]
350    #[inline(always)]
351    #[must_use]
352    pub fn srpsel(&mut self) -> SrpselW<CtrlSpec> {
353        SrpselW::new(self, 9)
354    }
355    #[doc = "Bit 10 - SRP Request"]
356    #[inline(always)]
357    #[must_use]
358    pub fn srpreq(&mut self) -> SrpreqW<CtrlSpec> {
359        SrpreqW::new(self, 10)
360    }
361    #[doc = "Bit 11 - HNP Request"]
362    #[inline(always)]
363    #[must_use]
364    pub fn hnpreq(&mut self) -> HnpreqW<CtrlSpec> {
365        HnpreqW::new(self, 11)
366    }
367    #[doc = "Bit 12 - OTG Pad Enable"]
368    #[inline(always)]
369    #[must_use]
370    pub fn otgpade(&mut self) -> OtgpadeW<CtrlSpec> {
371        OtgpadeW::new(self, 12)
372    }
373    #[doc = "Bit 13 - VBus Polarity Off"]
374    #[inline(always)]
375    #[must_use]
376    pub fn vbuspo(&mut self) -> VbuspoW<CtrlSpec> {
377        VbuspoW::new(self, 13)
378    }
379    #[doc = "Bit 14 - Freeze USB Clock"]
380    #[inline(always)]
381    #[must_use]
382    pub fn frzclk(&mut self) -> FrzclkW<CtrlSpec> {
383        FrzclkW::new(self, 14)
384    }
385    #[doc = "Bit 15 - UOTGHS Enable"]
386    #[inline(always)]
387    #[must_use]
388    pub fn usbe(&mut self) -> UsbeW<CtrlSpec> {
389        UsbeW::new(self, 15)
390    }
391    #[doc = "Bits 16:17 - Timer Value"]
392    #[inline(always)]
393    #[must_use]
394    pub fn timvalue(&mut self) -> TimvalueW<CtrlSpec> {
395        TimvalueW::new(self, 16)
396    }
397    #[doc = "Bits 20:21 - Timer Page"]
398    #[inline(always)]
399    #[must_use]
400    pub fn timpage(&mut self) -> TimpageW<CtrlSpec> {
401        TimpageW::new(self, 20)
402    }
403    #[doc = "Bit 22 - Timer Access Unlock"]
404    #[inline(always)]
405    #[must_use]
406    pub fn unlock(&mut self) -> UnlockW<CtrlSpec> {
407        UnlockW::new(self, 22)
408    }
409    #[doc = "Bit 24 - UOTGID Pin Enable"]
410    #[inline(always)]
411    #[must_use]
412    pub fn uide(&mut self) -> UideW<CtrlSpec> {
413        UideW::new(self, 24)
414    }
415    #[doc = "Bit 25 - UOTGHS Mode"]
416    #[inline(always)]
417    #[must_use]
418    pub fn uimod(&mut self) -> UimodW<CtrlSpec> {
419        UimodW::new(self, 25)
420    }
421}
422#[doc = "General Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
423pub struct CtrlSpec;
424impl crate::RegisterSpec for CtrlSpec {
425    type Ux = u32;
426}
427#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
428impl crate::Readable for CtrlSpec {}
429#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
430impl crate::Writable for CtrlSpec {
431    type Safety = crate::Unsafe;
432    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
433    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
434}
435#[doc = "`reset()` method sets CTRL to value 0x0300_4000"]
436impl crate::Resettable for CtrlSpec {
437    const RESET_VALUE: u32 = 0x0300_4000;
438}
atsam3a4c/uotghs/ctrl.rs

atsam3a4c/uotghs/
ctrl.rs
