asmkit/x86/features/
SMAP.rs

1use crate::x86::assembler::*;
2use crate::x86::operands::*;
3use super::super::opcodes::*;
4use crate::core::emitter::*;
5use crate::core::operand::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `CLAC` (CLAC). 
11/// Clears the AC flag bit in EFLAGS register. This disables any alignment checking of user-mode data accesses. Ifthe SMAP bit is set in the CR4 register, this disallows explicit supervisor-mode data accesses to user-mode pages.
12///
13///
14/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/CLAC.html).
15///
16/// Supported operand variants:
17///
18/// ```text
19/// +---+----------+
20/// | # | Operands |
21/// +---+----------+
22/// | 1 | (none)   |
23/// +---+----------+
24/// ```
25pub trait ClacEmitter {
26    fn clac(&mut self);
27}
28
29impl<'a> ClacEmitter for Assembler<'a> {
30    fn clac(&mut self) {
31        self.emit(CLAC, &NOREG, &NOREG, &NOREG, &NOREG);
32    }
33}
34
35/// `STAC` (STAC). 
36/// Sets the AC flag bit in EFLAGS register. This may enable alignment checking of user-mode data accesses. This allows explicit supervisor-mode data accesses to user-mode pages even if the SMAP bit is set in the CR4 register.
37///
38///
39/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/STAC.html).
40///
41/// Supported operand variants:
42///
43/// ```text
44/// +---+----------+
45/// | # | Operands |
46/// +---+----------+
47/// | 1 | (none)   |
48/// +---+----------+
49/// ```
50pub trait StacEmitter {
51    fn stac(&mut self);
52}
53
54impl<'a> StacEmitter for Assembler<'a> {
55    fn stac(&mut self) {
56        self.emit(STAC, &NOREG, &NOREG, &NOREG, &NOREG);
57    }
58}
59
60
61impl<'a> Assembler<'a> {
62    /// `CLAC` (CLAC). 
63    /// Clears the AC flag bit in EFLAGS register. This disables any alignment checking of user-mode data accesses. Ifthe SMAP bit is set in the CR4 register, this disallows explicit supervisor-mode data accesses to user-mode pages.
64    ///
65    ///
66    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/CLAC.html).
67    ///
68    /// Supported operand variants:
69    ///
70    /// ```text
71    /// +---+----------+
72    /// | # | Operands |
73    /// +---+----------+
74    /// | 1 | (none)   |
75    /// +---+----------+
76    /// ```
77    #[inline]
78    pub fn clac(&mut self)
79    where Assembler<'a>: ClacEmitter {
80        <Self as ClacEmitter>::clac(self);
81    }
82    /// `STAC` (STAC). 
83    /// Sets the AC flag bit in EFLAGS register. This may enable alignment checking of user-mode data accesses. This allows explicit supervisor-mode data accesses to user-mode pages even if the SMAP bit is set in the CR4 register.
84    ///
85    ///
86    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/STAC.html).
87    ///
88    /// Supported operand variants:
89    ///
90    /// ```text
91    /// +---+----------+
92    /// | # | Operands |
93    /// +---+----------+
94    /// | 1 | (none)   |
95    /// +---+----------+
96    /// ```
97    #[inline]
98    pub fn stac(&mut self)
99    where Assembler<'a>: StacEmitter {
100        <Self as StacEmitter>::stac(self);
101    }
102}
asmkit/x86/features/SMAP.rs

asmkit/x86/features/
SMAP.rs
