asmkit/x86/features/MOVBE.rs
1use crate::x86::assembler::*;
2use crate::x86::operands::*;
3use super::super::opcodes::*;
4use crate::core::emitter::*;
5use crate::core::operand::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `MOVBE` (MOVBE).
11/// Performs a byte swap operation on the data copied from the second operand (source operand) and store the result in the first operand (destination operand). The source operand can be a general-purpose register, or memory location; the destination register can be a general-purpose register, or a memory location; however, both operands can not be registers, and only one operand can be a memory location. Both operands must be the same size, which can be a word, a doubleword or quadword.
12///
13///
14/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/MOVBE.html).
15///
16/// Supported operand variants:
17///
18/// ```text
19/// +---+----------+
20/// | # | Operands |
21/// +---+----------+
22/// | 1 | Gpd, Mem |
23/// | 2 | Gpq, Mem |
24/// | 3 | Gpw, Mem |
25/// | 4 | Mem, Gpd |
26/// | 5 | Mem, Gpq |
27/// | 6 | Mem, Gpw |
28/// +---+----------+
29/// ```
30pub trait MovbeEmitter<A, B> {
31 fn movbe(&mut self, op0: A, op1: B);
32}
33
34impl<'a> MovbeEmitter<Gpw, Mem> for Assembler<'a> {
35 fn movbe(&mut self, op0: Gpw, op1: Mem) {
36 self.emit(MOVBE16RM, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
37 }
38}
39
40impl<'a> MovbeEmitter<Gpd, Mem> for Assembler<'a> {
41 fn movbe(&mut self, op0: Gpd, op1: Mem) {
42 self.emit(MOVBE32RM, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
43 }
44}
45
46impl<'a> MovbeEmitter<Gpq, Mem> for Assembler<'a> {
47 fn movbe(&mut self, op0: Gpq, op1: Mem) {
48 self.emit(MOVBE64RM, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
49 }
50}
51
52impl<'a> MovbeEmitter<Mem, Gpw> for Assembler<'a> {
53 fn movbe(&mut self, op0: Mem, op1: Gpw) {
54 self.emit(MOVBE16MR, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
55 }
56}
57
58impl<'a> MovbeEmitter<Mem, Gpd> for Assembler<'a> {
59 fn movbe(&mut self, op0: Mem, op1: Gpd) {
60 self.emit(MOVBE32MR, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
61 }
62}
63
64impl<'a> MovbeEmitter<Mem, Gpq> for Assembler<'a> {
65 fn movbe(&mut self, op0: Mem, op1: Gpq) {
66 self.emit(MOVBE64MR, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
67 }
68}
69
70
71impl<'a> Assembler<'a> {
72 /// `MOVBE` (MOVBE).
73 /// Performs a byte swap operation on the data copied from the second operand (source operand) and store the result in the first operand (destination operand). The source operand can be a general-purpose register, or memory location; the destination register can be a general-purpose register, or a memory location; however, both operands can not be registers, and only one operand can be a memory location. Both operands must be the same size, which can be a word, a doubleword or quadword.
74 ///
75 ///
76 /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/MOVBE.html).
77 ///
78 /// Supported operand variants:
79 ///
80 /// ```text
81 /// +---+----------+
82 /// | # | Operands |
83 /// +---+----------+
84 /// | 1 | Gpd, Mem |
85 /// | 2 | Gpq, Mem |
86 /// | 3 | Gpw, Mem |
87 /// | 4 | Mem, Gpd |
88 /// | 5 | Mem, Gpq |
89 /// | 6 | Mem, Gpw |
90 /// +---+----------+
91 /// ```
92 #[inline]
93 pub fn movbe<A, B>(&mut self, op0: A, op1: B)
94 where Assembler<'a>: MovbeEmitter<A, B> {
95 <Self as MovbeEmitter<A, B>>::movbe(self, op0, op1);
96 }
97}