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asmkit/x86/features/
586.rs

1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `CMPXCHG16BM`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+----------+
16/// | # | Operands |
17/// +---+----------+
18/// | 1 | Mem      |
19/// +---+----------+
20/// ```
21pub trait Cmpxchg16bmEmitter<A> {
22    fn cmpxchg16bm(&mut self, op0: A);
23}
24
25impl<'a> Cmpxchg16bmEmitter<Mem> for Assembler<'a> {
26    fn cmpxchg16bm(&mut self, op0: Mem) {
27        self.emit(CMPXCHG16BM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
28    }
29}
30
31/// `CMPXCHG8BM`.
32///
33/// Supported operand variants:
34///
35/// ```text
36/// +---+----------+
37/// | # | Operands |
38/// +---+----------+
39/// | 1 | Mem      |
40/// +---+----------+
41/// ```
42pub trait Cmpxchg8bmEmitter<A> {
43    fn cmpxchg8bm(&mut self, op0: A);
44}
45
46impl<'a> Cmpxchg8bmEmitter<Mem> for Assembler<'a> {
47    fn cmpxchg8bm(&mut self, op0: Mem) {
48        self.emit(CMPXCHG8BM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
49    }
50}
51
52/// `CMPXCHGD`.
53///
54/// Supported operand variants:
55///
56/// ```text
57/// +---+----------+
58/// | # | Operands |
59/// +---+----------+
60/// | 1 | Mem      |
61/// +---+----------+
62/// ```
63pub trait CmpxchgdEmitter<A> {
64    fn cmpxchgd(&mut self, op0: A);
65}
66
67impl<'a> CmpxchgdEmitter<Mem> for Assembler<'a> {
68    fn cmpxchgd(&mut self, op0: Mem) {
69        self.emit(CMPXCHGD32M, op0.as_operand(), &NOREG, &NOREG, &NOREG);
70    }
71}
72
73/// `CPUID`.
74///
75/// Supported operand variants:
76///
77/// ```text
78/// +---+----------+
79/// | # | Operands |
80/// +---+----------+
81/// | 1 | (none)   |
82/// +---+----------+
83/// ```
84pub trait CpuidEmitter {
85    fn cpuid(&mut self);
86}
87
88impl<'a> CpuidEmitter for Assembler<'a> {
89    fn cpuid(&mut self) {
90        self.emit(CPUID, &NOREG, &NOREG, &NOREG, &NOREG);
91    }
92}
93
94/// `RDMSR`.
95///
96/// Supported operand variants:
97///
98/// ```text
99/// +---+----------+
100/// | # | Operands |
101/// +---+----------+
102/// | 1 | (none)   |
103/// +---+----------+
104/// ```
105pub trait RdmsrEmitter {
106    fn rdmsr(&mut self);
107}
108
109impl<'a> RdmsrEmitter for Assembler<'a> {
110    fn rdmsr(&mut self) {
111        self.emit(RDMSR, &NOREG, &NOREG, &NOREG, &NOREG);
112    }
113}
114
115/// `RDTSC`.
116///
117/// Supported operand variants:
118///
119/// ```text
120/// +---+----------+
121/// | # | Operands |
122/// +---+----------+
123/// | 1 | (none)   |
124/// +---+----------+
125/// ```
126pub trait RdtscEmitter {
127    fn rdtsc(&mut self);
128}
129
130impl<'a> RdtscEmitter for Assembler<'a> {
131    fn rdtsc(&mut self) {
132        self.emit(RDTSC, &NOREG, &NOREG, &NOREG, &NOREG);
133    }
134}
135
136/// `RSM`.
137///
138/// Supported operand variants:
139///
140/// ```text
141/// +---+----------+
142/// | # | Operands |
143/// +---+----------+
144/// | 1 | (none)   |
145/// +---+----------+
146/// ```
147pub trait RsmEmitter {
148    fn rsm(&mut self);
149}
150
151impl<'a> RsmEmitter for Assembler<'a> {
152    fn rsm(&mut self) {
153        self.emit(RSM, &NOREG, &NOREG, &NOREG, &NOREG);
154    }
155}
156
157/// `WRMSR`.
158///
159/// Supported operand variants:
160///
161/// ```text
162/// +---+----------+
163/// | # | Operands |
164/// +---+----------+
165/// | 1 | (none)   |
166/// +---+----------+
167/// ```
168pub trait WrmsrEmitter {
169    fn wrmsr(&mut self);
170}
171
172impl<'a> WrmsrEmitter for Assembler<'a> {
173    fn wrmsr(&mut self) {
174        self.emit(WRMSR, &NOREG, &NOREG, &NOREG, &NOREG);
175    }
176}
177
178impl<'a> Assembler<'a> {
179    /// `CMPXCHG16BM`.
180    ///
181    /// Supported operand variants:
182    ///
183    /// ```text
184    /// +---+----------+
185    /// | # | Operands |
186    /// +---+----------+
187    /// | 1 | Mem      |
188    /// +---+----------+
189    /// ```
190    #[inline]
191    pub fn cmpxchg16bm<A>(&mut self, op0: A)
192    where
193        Assembler<'a>: Cmpxchg16bmEmitter<A>,
194    {
195        <Self as Cmpxchg16bmEmitter<A>>::cmpxchg16bm(self, op0);
196    }
197    /// `CMPXCHG8BM`.
198    ///
199    /// Supported operand variants:
200    ///
201    /// ```text
202    /// +---+----------+
203    /// | # | Operands |
204    /// +---+----------+
205    /// | 1 | Mem      |
206    /// +---+----------+
207    /// ```
208    #[inline]
209    pub fn cmpxchg8bm<A>(&mut self, op0: A)
210    where
211        Assembler<'a>: Cmpxchg8bmEmitter<A>,
212    {
213        <Self as Cmpxchg8bmEmitter<A>>::cmpxchg8bm(self, op0);
214    }
215    /// `CMPXCHGD`.
216    ///
217    /// Supported operand variants:
218    ///
219    /// ```text
220    /// +---+----------+
221    /// | # | Operands |
222    /// +---+----------+
223    /// | 1 | Mem      |
224    /// +---+----------+
225    /// ```
226    #[inline]
227    pub fn cmpxchgd<A>(&mut self, op0: A)
228    where
229        Assembler<'a>: CmpxchgdEmitter<A>,
230    {
231        <Self as CmpxchgdEmitter<A>>::cmpxchgd(self, op0);
232    }
233    /// `CPUID`.
234    ///
235    /// Supported operand variants:
236    ///
237    /// ```text
238    /// +---+----------+
239    /// | # | Operands |
240    /// +---+----------+
241    /// | 1 | (none)   |
242    /// +---+----------+
243    /// ```
244    #[inline]
245    pub fn cpuid(&mut self)
246    where
247        Assembler<'a>: CpuidEmitter,
248    {
249        <Self as CpuidEmitter>::cpuid(self);
250    }
251    /// `RDMSR`.
252    ///
253    /// Supported operand variants:
254    ///
255    /// ```text
256    /// +---+----------+
257    /// | # | Operands |
258    /// +---+----------+
259    /// | 1 | (none)   |
260    /// +---+----------+
261    /// ```
262    #[inline]
263    pub fn rdmsr(&mut self)
264    where
265        Assembler<'a>: RdmsrEmitter,
266    {
267        <Self as RdmsrEmitter>::rdmsr(self);
268    }
269    /// `RDTSC`.
270    ///
271    /// Supported operand variants:
272    ///
273    /// ```text
274    /// +---+----------+
275    /// | # | Operands |
276    /// +---+----------+
277    /// | 1 | (none)   |
278    /// +---+----------+
279    /// ```
280    #[inline]
281    pub fn rdtsc(&mut self)
282    where
283        Assembler<'a>: RdtscEmitter,
284    {
285        <Self as RdtscEmitter>::rdtsc(self);
286    }
287    /// `RSM`.
288    ///
289    /// Supported operand variants:
290    ///
291    /// ```text
292    /// +---+----------+
293    /// | # | Operands |
294    /// +---+----------+
295    /// | 1 | (none)   |
296    /// +---+----------+
297    /// ```
298    #[inline]
299    pub fn rsm(&mut self)
300    where
301        Assembler<'a>: RsmEmitter,
302    {
303        <Self as RsmEmitter>::rsm(self);
304    }
305    /// `WRMSR`.
306    ///
307    /// Supported operand variants:
308    ///
309    /// ```text
310    /// +---+----------+
311    /// | # | Operands |
312    /// +---+----------+
313    /// | 1 | (none)   |
314    /// +---+----------+
315    /// ```
316    #[inline]
317    pub fn wrmsr(&mut self)
318    where
319        Assembler<'a>: WrmsrEmitter,
320    {
321        <Self as WrmsrEmitter>::wrmsr(self);
322    }
323}