armagnac 0.3.0

A simple ARM emulation library for simulating embedded systems
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90

//! Implements MOVT (Move Top) instruction.

use super::Encoding::{self, T1};
use super::Instruction;
use super::{
    ArmVersion::{V7EM, V7M, V8M},
    Pattern,
};
use crate::{
    core::ItState,
    core::{Effect, Processor, RunError},
    decoder::DecodeError,
    instructions::{unpredictable, DecodeHelper},
    registers::RegisterIndex,
};

/// MOVT instruction.
///
/// Move Top.
pub struct Movt {
    /// Destination register.
    rd: RegisterIndex,
    /// Immediate value to be written to Rd.
    imm16: u16,
}

impl Instruction for Movt {
    fn patterns() -> &'static [Pattern] {
        &[Pattern {
            encoding: T1,
            versions: &[V7M, V7EM, V8M],
            expression: "11110x101100xxxx0xxxxxxxxxxxxxxx",
        }]
    }

    fn try_decode(encoding: Encoding, ins: u32, _state: ItState) -> Result<Self, DecodeError> {
        debug_assert_eq!(encoding, T1);
        let rd = ins.reg4(8);
        unpredictable(rd.is_sp_or_pc())?;
        let imm16 =
            ((ins.imm4(16) << 12) | (ins.imm1(26) << 11) | (ins.imm3(12) << 8) | ins.imm8(0))
                as u16;
        Ok(Self { rd, imm16 })
    }

    fn execute(&self, proc: &mut Processor) -> Result<Effect, RunError> {
        let rd = proc[self.rd];
        proc.set(self.rd, ((self.imm16 as u32) << 16) | rd & 0x0000ffff);
        Ok(Effect::None)
    }

    fn name(&self) -> String {
        "movt".into()
    }

    fn args(&self, _pc: u32) -> String {
        format!("{}, #{}", self.rd, self.imm16)
    }
}

#[cfg(test)]
mod tests {
    use crate::{
        core::{Config, Processor},
        instructions::{movt::Movt, Instruction},
        registers::RegisterIndex,
    };

    #[test]
    fn test_movt() {
        let vectors = [
            (RegisterIndex::R0, 0x1234, 0x12344321),
            (RegisterIndex::R1, 0, 0x4321),
            (RegisterIndex::R2, 0xffff, 0xffff4321),
        ];
        for v in vectors {
            let mut proc = Processor::new(Config::v7m());
            proc.set(v.0, 0x87654321);
            let mut expected = proc.registers.clone();
            Movt {
                rd: v.0,
                imm16: v.1,
            }
            .execute(&mut proc)
            .unwrap();
            expected.set(v.0, v.2);
            assert_eq!(proc.registers, expected);
        }
    }
}