ambiq_apollo3p_pac/mcuctrl/
simobuck2.rs

1#[doc = "Reader of register SIMOBUCK2"]
2pub type R = crate::R<u32, super::SIMOBUCK2>;
3#[doc = "Writer for register SIMOBUCK2"]
4pub type W = crate::W<u32, super::SIMOBUCK2>;
5#[doc = "Register SIMOBUCK2 `reset()`'s with value 0x00aa_0000"]
6impl crate::ResetValue for super::SIMOBUCK2 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x00aa_0000
11    }
12}
13#[doc = "Reader of field `RESERVED_RW_24`"]
14pub type RESERVED_RW_24_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `RESERVED_RW_24`"]
16pub struct RESERVED_RW_24_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> RESERVED_RW_24_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0xff << 24)) | (((value as u32) & 0xff) << 24);
24        self.w
25    }
26}
27#[doc = "Reader of field `SIMOBUCKCORELPLOWTONTRIM`"]
28pub type SIMOBUCKCORELPLOWTONTRIM_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `SIMOBUCKCORELPLOWTONTRIM`"]
30pub struct SIMOBUCKCORELPLOWTONTRIM_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> SIMOBUCKCORELPLOWTONTRIM_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x0f << 20)) | (((value as u32) & 0x0f) << 20);
38        self.w
39    }
40}
41#[doc = "Reader of field `SIMOBUCKCORELPHIGHTONTRIM`"]
42pub type SIMOBUCKCORELPHIGHTONTRIM_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `SIMOBUCKCORELPHIGHTONTRIM`"]
44pub struct SIMOBUCKCORELPHIGHTONTRIM_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> SIMOBUCKCORELPHIGHTONTRIM_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
52        self.w
53    }
54}
55#[doc = "Reader of field `RESERVED_RW_0`"]
56pub type RESERVED_RW_0_R = crate::R<u16, u16>;
57#[doc = "Write proxy for field `RESERVED_RW_0`"]
58pub struct RESERVED_RW_0_W<'a> {
59    w: &'a mut W,
60}
61impl<'a> RESERVED_RW_0_W<'a> {
62    #[doc = r"Writes raw bits to the field"]
63    #[inline(always)]
64    pub unsafe fn bits(self, value: u16) -> &'a mut W {
65        self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
66        self.w
67    }
68}
69impl R {
70    #[doc = "Bits 24:31 - Reserved bits, always leave unchanged. The SIMOBUCK2 register must be modified via atomic RMW, leaving this bit field completely unmodified. Failure to do so will result in unpredictable behavior."]
71    #[inline(always)]
72    pub fn reserved_rw_24(&self) -> RESERVED_RW_24_R {
73        RESERVED_RW_24_R::new(((self.bits >> 24) & 0xff) as u8)
74    }
75    #[doc = "Bits 20:23 - simobuck_core_lp_low_ton_trim"]
76    #[inline(always)]
77    pub fn simobuckcorelplowtontrim(&self) -> SIMOBUCKCORELPLOWTONTRIM_R {
78        SIMOBUCKCORELPLOWTONTRIM_R::new(((self.bits >> 20) & 0x0f) as u8)
79    }
80    #[doc = "Bits 16:19 - simobuck_core_lp_high_ton_trim"]
81    #[inline(always)]
82    pub fn simobuckcorelphightontrim(&self) -> SIMOBUCKCORELPHIGHTONTRIM_R {
83        SIMOBUCKCORELPHIGHTONTRIM_R::new(((self.bits >> 16) & 0x0f) as u8)
84    }
85    #[doc = "Bits 0:15 - Reserved bits, always leave unchanged. The SIMOBUCK2 register must be modified via atomic RMW, leaving this bit field completely unmodified. Failure to do so will result in unpredictable behavior."]
86    #[inline(always)]
87    pub fn reserved_rw_0(&self) -> RESERVED_RW_0_R {
88        RESERVED_RW_0_R::new((self.bits & 0xffff) as u16)
89    }
90}
91impl W {
92    #[doc = "Bits 24:31 - Reserved bits, always leave unchanged. The SIMOBUCK2 register must be modified via atomic RMW, leaving this bit field completely unmodified. Failure to do so will result in unpredictable behavior."]
93    #[inline(always)]
94    pub fn reserved_rw_24(&mut self) -> RESERVED_RW_24_W {
95        RESERVED_RW_24_W { w: self }
96    }
97    #[doc = "Bits 20:23 - simobuck_core_lp_low_ton_trim"]
98    #[inline(always)]
99    pub fn simobuckcorelplowtontrim(&mut self) -> SIMOBUCKCORELPLOWTONTRIM_W {
100        SIMOBUCKCORELPLOWTONTRIM_W { w: self }
101    }
102    #[doc = "Bits 16:19 - simobuck_core_lp_high_ton_trim"]
103    #[inline(always)]
104    pub fn simobuckcorelphightontrim(&mut self) -> SIMOBUCKCORELPHIGHTONTRIM_W {
105        SIMOBUCKCORELPHIGHTONTRIM_W { w: self }
106    }
107    #[doc = "Bits 0:15 - Reserved bits, always leave unchanged. The SIMOBUCK2 register must be modified via atomic RMW, leaving this bit field completely unmodified. Failure to do so will result in unpredictable behavior."]
108    #[inline(always)]
109    pub fn reserved_rw_0(&mut self) -> RESERVED_RW_0_W {
110        RESERVED_RW_0_W { w: self }
111    }
112}
ambiq_apollo3p_pac/mcuctrl/simobuck2.rs

ambiq_apollo3p_pac/mcuctrl/
simobuck2.rs
