ambiq_apollo2_pac/gpio/
padregh.rs

1#[doc = "Reader of register PADREGH"]
2pub type R = crate::R<u32, super::PADREGH>;
3#[doc = "Writer for register PADREGH"]
4pub type W = crate::W<u32, super::PADREGH>;
5#[doc = "Register PADREGH `reset()`'s with value 0x1818_1818"]
6impl crate::ResetValue for super::PADREGH {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x1818_1818
11    }
12}
13#[doc = "Pad 31 function select\n\nValue on reset: 3"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum PAD31FNCSEL_A {
17    #[doc = "0: Configure as the analog input for ADC single ended input 3"]
18    ADCSE3 = 0,
19    #[doc = "1: Configure as the SPI channel 4 nCE signal from IOMSTR0"]
20    M0NCE4 = 1,
21    #[doc = "2: Configure as the input/output signal from CTIMER A3"]
22    TCTA3 = 2,
23    #[doc = "3: Configure as GPIO31"]
24    GPIO31 = 3,
25    #[doc = "4: Configure as the UART0 RX input signal"]
26    UART0RX = 4,
27    #[doc = "5: Configure as the input/output signal from CTIMER B1"]
28    TCTB1 = 5,
29    #[doc = "6: Undefined/should not be used"]
30    UNDEF6 = 6,
31    #[doc = "7: Undefined/should not be used"]
32    UNDEF7 = 7,
33}
34impl From<PAD31FNCSEL_A> for u8 {
35    #[inline(always)]
36    fn from(variant: PAD31FNCSEL_A) -> Self {
37        variant as _
38    }
39}
40#[doc = "Reader of field `PAD31FNCSEL`"]
41pub type PAD31FNCSEL_R = crate::R<u8, PAD31FNCSEL_A>;
42impl PAD31FNCSEL_R {
43    #[doc = r"Get enumerated values variant"]
44    #[inline(always)]
45    pub fn variant(&self) -> PAD31FNCSEL_A {
46        match self.bits {
47            0 => PAD31FNCSEL_A::ADCSE3,
48            1 => PAD31FNCSEL_A::M0NCE4,
49            2 => PAD31FNCSEL_A::TCTA3,
50            3 => PAD31FNCSEL_A::GPIO31,
51            4 => PAD31FNCSEL_A::UART0RX,
52            5 => PAD31FNCSEL_A::TCTB1,
53            6 => PAD31FNCSEL_A::UNDEF6,
54            7 => PAD31FNCSEL_A::UNDEF7,
55            _ => unreachable!(),
56        }
57    }
58    #[doc = "Checks if the value of the field is `ADCSE3`"]
59    #[inline(always)]
60    pub fn is_adcse3(&self) -> bool {
61        *self == PAD31FNCSEL_A::ADCSE3
62    }
63    #[doc = "Checks if the value of the field is `M0NCE4`"]
64    #[inline(always)]
65    pub fn is_m0n_ce4(&self) -> bool {
66        *self == PAD31FNCSEL_A::M0NCE4
67    }
68    #[doc = "Checks if the value of the field is `TCTA3`"]
69    #[inline(always)]
70    pub fn is_tcta3(&self) -> bool {
71        *self == PAD31FNCSEL_A::TCTA3
72    }
73    #[doc = "Checks if the value of the field is `GPIO31`"]
74    #[inline(always)]
75    pub fn is_gpio31(&self) -> bool {
76        *self == PAD31FNCSEL_A::GPIO31
77    }
78    #[doc = "Checks if the value of the field is `UART0RX`"]
79    #[inline(always)]
80    pub fn is_uart0rx(&self) -> bool {
81        *self == PAD31FNCSEL_A::UART0RX
82    }
83    #[doc = "Checks if the value of the field is `TCTB1`"]
84    #[inline(always)]
85    pub fn is_tctb1(&self) -> bool {
86        *self == PAD31FNCSEL_A::TCTB1
87    }
88    #[doc = "Checks if the value of the field is `UNDEF6`"]
89    #[inline(always)]
90    pub fn is_undef6(&self) -> bool {
91        *self == PAD31FNCSEL_A::UNDEF6
92    }
93    #[doc = "Checks if the value of the field is `UNDEF7`"]
94    #[inline(always)]
95    pub fn is_undef7(&self) -> bool {
96        *self == PAD31FNCSEL_A::UNDEF7
97    }
98}
99#[doc = "Write proxy for field `PAD31FNCSEL`"]
100pub struct PAD31FNCSEL_W<'a> {
101    w: &'a mut W,
102}
103impl<'a> PAD31FNCSEL_W<'a> {
104    #[doc = r"Writes `variant` to the field"]
105    #[inline(always)]
106    pub fn variant(self, variant: PAD31FNCSEL_A) -> &'a mut W {
107        {
108            self.bits(variant.into())
109        }
110    }
111    #[doc = "Configure as the analog input for ADC single ended input 3"]
112    #[inline(always)]
113    pub fn adcse3(self) -> &'a mut W {
114        self.variant(PAD31FNCSEL_A::ADCSE3)
115    }
116    #[doc = "Configure as the SPI channel 4 nCE signal from IOMSTR0"]
117    #[inline(always)]
118    pub fn m0n_ce4(self) -> &'a mut W {
119        self.variant(PAD31FNCSEL_A::M0NCE4)
120    }
121    #[doc = "Configure as the input/output signal from CTIMER A3"]
122    #[inline(always)]
123    pub fn tcta3(self) -> &'a mut W {
124        self.variant(PAD31FNCSEL_A::TCTA3)
125    }
126    #[doc = "Configure as GPIO31"]
127    #[inline(always)]
128    pub fn gpio31(self) -> &'a mut W {
129        self.variant(PAD31FNCSEL_A::GPIO31)
130    }
131    #[doc = "Configure as the UART0 RX input signal"]
132    #[inline(always)]
133    pub fn uart0rx(self) -> &'a mut W {
134        self.variant(PAD31FNCSEL_A::UART0RX)
135    }
136    #[doc = "Configure as the input/output signal from CTIMER B1"]
137    #[inline(always)]
138    pub fn tctb1(self) -> &'a mut W {
139        self.variant(PAD31FNCSEL_A::TCTB1)
140    }
141    #[doc = "Undefined/should not be used"]
142    #[inline(always)]
143    pub fn undef6(self) -> &'a mut W {
144        self.variant(PAD31FNCSEL_A::UNDEF6)
145    }
146    #[doc = "Undefined/should not be used"]
147    #[inline(always)]
148    pub fn undef7(self) -> &'a mut W {
149        self.variant(PAD31FNCSEL_A::UNDEF7)
150    }
151    #[doc = r"Writes raw bits to the field"]
152    #[inline(always)]
153    pub fn bits(self, value: u8) -> &'a mut W {
154        self.w.bits = (self.w.bits & !(0x07 << 27)) | (((value as u32) & 0x07) << 27);
155        self.w
156    }
157}
158#[doc = "Pad 31 drive strength\n\nValue on reset: 0"]
159#[derive(Clone, Copy, Debug, PartialEq)]
160pub enum PAD31STRNG_A {
161    #[doc = "0: Low drive strength"]
162    LOW = 0,
163    #[doc = "1: High drive strength"]
164    HIGH = 1,
165}
166impl From<PAD31STRNG_A> for bool {
167    #[inline(always)]
168    fn from(variant: PAD31STRNG_A) -> Self {
169        variant as u8 != 0
170    }
171}
172#[doc = "Reader of field `PAD31STRNG`"]
173pub type PAD31STRNG_R = crate::R<bool, PAD31STRNG_A>;
174impl PAD31STRNG_R {
175    #[doc = r"Get enumerated values variant"]
176    #[inline(always)]
177    pub fn variant(&self) -> PAD31STRNG_A {
178        match self.bits {
179            false => PAD31STRNG_A::LOW,
180            true => PAD31STRNG_A::HIGH,
181        }
182    }
183    #[doc = "Checks if the value of the field is `LOW`"]
184    #[inline(always)]
185    pub fn is_low(&self) -> bool {
186        *self == PAD31STRNG_A::LOW
187    }
188    #[doc = "Checks if the value of the field is `HIGH`"]
189    #[inline(always)]
190    pub fn is_high(&self) -> bool {
191        *self == PAD31STRNG_A::HIGH
192    }
193}
194#[doc = "Write proxy for field `PAD31STRNG`"]
195pub struct PAD31STRNG_W<'a> {
196    w: &'a mut W,
197}
198impl<'a> PAD31STRNG_W<'a> {
199    #[doc = r"Writes `variant` to the field"]
200    #[inline(always)]
201    pub fn variant(self, variant: PAD31STRNG_A) -> &'a mut W {
202        {
203            self.bit(variant.into())
204        }
205    }
206    #[doc = "Low drive strength"]
207    #[inline(always)]
208    pub fn low(self) -> &'a mut W {
209        self.variant(PAD31STRNG_A::LOW)
210    }
211    #[doc = "High drive strength"]
212    #[inline(always)]
213    pub fn high(self) -> &'a mut W {
214        self.variant(PAD31STRNG_A::HIGH)
215    }
216    #[doc = r"Sets the field bit"]
217    #[inline(always)]
218    pub fn set_bit(self) -> &'a mut W {
219        self.bit(true)
220    }
221    #[doc = r"Clears the field bit"]
222    #[inline(always)]
223    pub fn clear_bit(self) -> &'a mut W {
224        self.bit(false)
225    }
226    #[doc = r"Writes raw bits to the field"]
227    #[inline(always)]
228    pub fn bit(self, value: bool) -> &'a mut W {
229        self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
230        self.w
231    }
232}
233#[doc = "Pad 31 input enable\n\nValue on reset: 0"]
234#[derive(Clone, Copy, Debug, PartialEq)]
235pub enum PAD31INPEN_A {
236    #[doc = "0: Pad input disabled"]
237    DIS = 0,
238    #[doc = "1: Pad input enabled"]
239    EN = 1,
240}
241impl From<PAD31INPEN_A> for bool {
242    #[inline(always)]
243    fn from(variant: PAD31INPEN_A) -> Self {
244        variant as u8 != 0
245    }
246}
247#[doc = "Reader of field `PAD31INPEN`"]
248pub type PAD31INPEN_R = crate::R<bool, PAD31INPEN_A>;
249impl PAD31INPEN_R {
250    #[doc = r"Get enumerated values variant"]
251    #[inline(always)]
252    pub fn variant(&self) -> PAD31INPEN_A {
253        match self.bits {
254            false => PAD31INPEN_A::DIS,
255            true => PAD31INPEN_A::EN,
256        }
257    }
258    #[doc = "Checks if the value of the field is `DIS`"]
259    #[inline(always)]
260    pub fn is_dis(&self) -> bool {
261        *self == PAD31INPEN_A::DIS
262    }
263    #[doc = "Checks if the value of the field is `EN`"]
264    #[inline(always)]
265    pub fn is_en(&self) -> bool {
266        *self == PAD31INPEN_A::EN
267    }
268}
269#[doc = "Write proxy for field `PAD31INPEN`"]
270pub struct PAD31INPEN_W<'a> {
271    w: &'a mut W,
272}
273impl<'a> PAD31INPEN_W<'a> {
274    #[doc = r"Writes `variant` to the field"]
275    #[inline(always)]
276    pub fn variant(self, variant: PAD31INPEN_A) -> &'a mut W {
277        {
278            self.bit(variant.into())
279        }
280    }
281    #[doc = "Pad input disabled"]
282    #[inline(always)]
283    pub fn dis(self) -> &'a mut W {
284        self.variant(PAD31INPEN_A::DIS)
285    }
286    #[doc = "Pad input enabled"]
287    #[inline(always)]
288    pub fn en(self) -> &'a mut W {
289        self.variant(PAD31INPEN_A::EN)
290    }
291    #[doc = r"Sets the field bit"]
292    #[inline(always)]
293    pub fn set_bit(self) -> &'a mut W {
294        self.bit(true)
295    }
296    #[doc = r"Clears the field bit"]
297    #[inline(always)]
298    pub fn clear_bit(self) -> &'a mut W {
299        self.bit(false)
300    }
301    #[doc = r"Writes raw bits to the field"]
302    #[inline(always)]
303    pub fn bit(self, value: bool) -> &'a mut W {
304        self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
305        self.w
306    }
307}
308#[doc = "Pad 31 pullup enable\n\nValue on reset: 0"]
309#[derive(Clone, Copy, Debug, PartialEq)]
310pub enum PAD31PULL_A {
311    #[doc = "0: Pullup disabled"]
312    DIS = 0,
313    #[doc = "1: Pullup enabled"]
314    EN = 1,
315}
316impl From<PAD31PULL_A> for bool {
317    #[inline(always)]
318    fn from(variant: PAD31PULL_A) -> Self {
319        variant as u8 != 0
320    }
321}
322#[doc = "Reader of field `PAD31PULL`"]
323pub type PAD31PULL_R = crate::R<bool, PAD31PULL_A>;
324impl PAD31PULL_R {
325    #[doc = r"Get enumerated values variant"]
326    #[inline(always)]
327    pub fn variant(&self) -> PAD31PULL_A {
328        match self.bits {
329            false => PAD31PULL_A::DIS,
330            true => PAD31PULL_A::EN,
331        }
332    }
333    #[doc = "Checks if the value of the field is `DIS`"]
334    #[inline(always)]
335    pub fn is_dis(&self) -> bool {
336        *self == PAD31PULL_A::DIS
337    }
338    #[doc = "Checks if the value of the field is `EN`"]
339    #[inline(always)]
340    pub fn is_en(&self) -> bool {
341        *self == PAD31PULL_A::EN
342    }
343}
344#[doc = "Write proxy for field `PAD31PULL`"]
345pub struct PAD31PULL_W<'a> {
346    w: &'a mut W,
347}
348impl<'a> PAD31PULL_W<'a> {
349    #[doc = r"Writes `variant` to the field"]
350    #[inline(always)]
351    pub fn variant(self, variant: PAD31PULL_A) -> &'a mut W {
352        {
353            self.bit(variant.into())
354        }
355    }
356    #[doc = "Pullup disabled"]
357    #[inline(always)]
358    pub fn dis(self) -> &'a mut W {
359        self.variant(PAD31PULL_A::DIS)
360    }
361    #[doc = "Pullup enabled"]
362    #[inline(always)]
363    pub fn en(self) -> &'a mut W {
364        self.variant(PAD31PULL_A::EN)
365    }
366    #[doc = r"Sets the field bit"]
367    #[inline(always)]
368    pub fn set_bit(self) -> &'a mut W {
369        self.bit(true)
370    }
371    #[doc = r"Clears the field bit"]
372    #[inline(always)]
373    pub fn clear_bit(self) -> &'a mut W {
374        self.bit(false)
375    }
376    #[doc = r"Writes raw bits to the field"]
377    #[inline(always)]
378    pub fn bit(self, value: bool) -> &'a mut W {
379        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
380        self.w
381    }
382}
383#[doc = "Pad 30 function select\n\nValue on reset: 3"]
384#[derive(Clone, Copy, Debug, PartialEq)]
385#[repr(u8)]
386pub enum PAD30FNCSEL_A {
387    #[doc = "0: Undefined/should not be used"]
388    UNDEF0 = 0,
389    #[doc = "1: Configure as the SPI channel 7 nCE signal from IOMSTR1"]
390    M1NCE7 = 1,
391    #[doc = "2: Configure as the input/output signal from CTIMER B2"]
392    TCTB2 = 2,
393    #[doc = "3: Configure as GPIO30"]
394    GPIO30 = 3,
395    #[doc = "4: Configure as UART0 TX output signal"]
396    UART0TX = 4,
397    #[doc = "5: Configure as UART1 RTS output signal"]
398    UA1RTS = 5,
399    #[doc = "6: Undefined/should not be used"]
400    UNDEF6 = 6,
401    #[doc = "7: Configure as the I2S Data output signal"]
402    I2S_DAT = 7,
403}
404impl From<PAD30FNCSEL_A> for u8 {
405    #[inline(always)]
406    fn from(variant: PAD30FNCSEL_A) -> Self {
407        variant as _
408    }
409}
410#[doc = "Reader of field `PAD30FNCSEL`"]
411pub type PAD30FNCSEL_R = crate::R<u8, PAD30FNCSEL_A>;
412impl PAD30FNCSEL_R {
413    #[doc = r"Get enumerated values variant"]
414    #[inline(always)]
415    pub fn variant(&self) -> PAD30FNCSEL_A {
416        match self.bits {
417            0 => PAD30FNCSEL_A::UNDEF0,
418            1 => PAD30FNCSEL_A::M1NCE7,
419            2 => PAD30FNCSEL_A::TCTB2,
420            3 => PAD30FNCSEL_A::GPIO30,
421            4 => PAD30FNCSEL_A::UART0TX,
422            5 => PAD30FNCSEL_A::UA1RTS,
423            6 => PAD30FNCSEL_A::UNDEF6,
424            7 => PAD30FNCSEL_A::I2S_DAT,
425            _ => unreachable!(),
426        }
427    }
428    #[doc = "Checks if the value of the field is `UNDEF0`"]
429    #[inline(always)]
430    pub fn is_undef0(&self) -> bool {
431        *self == PAD30FNCSEL_A::UNDEF0
432    }
433    #[doc = "Checks if the value of the field is `M1NCE7`"]
434    #[inline(always)]
435    pub fn is_m1n_ce7(&self) -> bool {
436        *self == PAD30FNCSEL_A::M1NCE7
437    }
438    #[doc = "Checks if the value of the field is `TCTB2`"]
439    #[inline(always)]
440    pub fn is_tctb2(&self) -> bool {
441        *self == PAD30FNCSEL_A::TCTB2
442    }
443    #[doc = "Checks if the value of the field is `GPIO30`"]
444    #[inline(always)]
445    pub fn is_gpio30(&self) -> bool {
446        *self == PAD30FNCSEL_A::GPIO30
447    }
448    #[doc = "Checks if the value of the field is `UART0TX`"]
449    #[inline(always)]
450    pub fn is_uart0tx(&self) -> bool {
451        *self == PAD30FNCSEL_A::UART0TX
452    }
453    #[doc = "Checks if the value of the field is `UA1RTS`"]
454    #[inline(always)]
455    pub fn is_ua1rts(&self) -> bool {
456        *self == PAD30FNCSEL_A::UA1RTS
457    }
458    #[doc = "Checks if the value of the field is `UNDEF6`"]
459    #[inline(always)]
460    pub fn is_undef6(&self) -> bool {
461        *self == PAD30FNCSEL_A::UNDEF6
462    }
463    #[doc = "Checks if the value of the field is `I2S_DAT`"]
464    #[inline(always)]
465    pub fn is_i2s_dat(&self) -> bool {
466        *self == PAD30FNCSEL_A::I2S_DAT
467    }
468}
469#[doc = "Write proxy for field `PAD30FNCSEL`"]
470pub struct PAD30FNCSEL_W<'a> {
471    w: &'a mut W,
472}
473impl<'a> PAD30FNCSEL_W<'a> {
474    #[doc = r"Writes `variant` to the field"]
475    #[inline(always)]
476    pub fn variant(self, variant: PAD30FNCSEL_A) -> &'a mut W {
477        {
478            self.bits(variant.into())
479        }
480    }
481    #[doc = "Undefined/should not be used"]
482    #[inline(always)]
483    pub fn undef0(self) -> &'a mut W {
484        self.variant(PAD30FNCSEL_A::UNDEF0)
485    }
486    #[doc = "Configure as the SPI channel 7 nCE signal from IOMSTR1"]
487    #[inline(always)]
488    pub fn m1n_ce7(self) -> &'a mut W {
489        self.variant(PAD30FNCSEL_A::M1NCE7)
490    }
491    #[doc = "Configure as the input/output signal from CTIMER B2"]
492    #[inline(always)]
493    pub fn tctb2(self) -> &'a mut W {
494        self.variant(PAD30FNCSEL_A::TCTB2)
495    }
496    #[doc = "Configure as GPIO30"]
497    #[inline(always)]
498    pub fn gpio30(self) -> &'a mut W {
499        self.variant(PAD30FNCSEL_A::GPIO30)
500    }
501    #[doc = "Configure as UART0 TX output signal"]
502    #[inline(always)]
503    pub fn uart0tx(self) -> &'a mut W {
504        self.variant(PAD30FNCSEL_A::UART0TX)
505    }
506    #[doc = "Configure as UART1 RTS output signal"]
507    #[inline(always)]
508    pub fn ua1rts(self) -> &'a mut W {
509        self.variant(PAD30FNCSEL_A::UA1RTS)
510    }
511    #[doc = "Undefined/should not be used"]
512    #[inline(always)]
513    pub fn undef6(self) -> &'a mut W {
514        self.variant(PAD30FNCSEL_A::UNDEF6)
515    }
516    #[doc = "Configure as the I2S Data output signal"]
517    #[inline(always)]
518    pub fn i2s_dat(self) -> &'a mut W {
519        self.variant(PAD30FNCSEL_A::I2S_DAT)
520    }
521    #[doc = r"Writes raw bits to the field"]
522    #[inline(always)]
523    pub fn bits(self, value: u8) -> &'a mut W {
524        self.w.bits = (self.w.bits & !(0x07 << 19)) | (((value as u32) & 0x07) << 19);
525        self.w
526    }
527}
528#[doc = "Pad 30 drive strength\n\nValue on reset: 0"]
529#[derive(Clone, Copy, Debug, PartialEq)]
530pub enum PAD30STRNG_A {
531    #[doc = "0: Low drive strength"]
532    LOW = 0,
533    #[doc = "1: High drive strength"]
534    HIGH = 1,
535}
536impl From<PAD30STRNG_A> for bool {
537    #[inline(always)]
538    fn from(variant: PAD30STRNG_A) -> Self {
539        variant as u8 != 0
540    }
541}
542#[doc = "Reader of field `PAD30STRNG`"]
543pub type PAD30STRNG_R = crate::R<bool, PAD30STRNG_A>;
544impl PAD30STRNG_R {
545    #[doc = r"Get enumerated values variant"]
546    #[inline(always)]
547    pub fn variant(&self) -> PAD30STRNG_A {
548        match self.bits {
549            false => PAD30STRNG_A::LOW,
550            true => PAD30STRNG_A::HIGH,
551        }
552    }
553    #[doc = "Checks if the value of the field is `LOW`"]
554    #[inline(always)]
555    pub fn is_low(&self) -> bool {
556        *self == PAD30STRNG_A::LOW
557    }
558    #[doc = "Checks if the value of the field is `HIGH`"]
559    #[inline(always)]
560    pub fn is_high(&self) -> bool {
561        *self == PAD30STRNG_A::HIGH
562    }
563}
564#[doc = "Write proxy for field `PAD30STRNG`"]
565pub struct PAD30STRNG_W<'a> {
566    w: &'a mut W,
567}
568impl<'a> PAD30STRNG_W<'a> {
569    #[doc = r"Writes `variant` to the field"]
570    #[inline(always)]
571    pub fn variant(self, variant: PAD30STRNG_A) -> &'a mut W {
572        {
573            self.bit(variant.into())
574        }
575    }
576    #[doc = "Low drive strength"]
577    #[inline(always)]
578    pub fn low(self) -> &'a mut W {
579        self.variant(PAD30STRNG_A::LOW)
580    }
581    #[doc = "High drive strength"]
582    #[inline(always)]
583    pub fn high(self) -> &'a mut W {
584        self.variant(PAD30STRNG_A::HIGH)
585    }
586    #[doc = r"Sets the field bit"]
587    #[inline(always)]
588    pub fn set_bit(self) -> &'a mut W {
589        self.bit(true)
590    }
591    #[doc = r"Clears the field bit"]
592    #[inline(always)]
593    pub fn clear_bit(self) -> &'a mut W {
594        self.bit(false)
595    }
596    #[doc = r"Writes raw bits to the field"]
597    #[inline(always)]
598    pub fn bit(self, value: bool) -> &'a mut W {
599        self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
600        self.w
601    }
602}
603#[doc = "Pad 30 input enable\n\nValue on reset: 0"]
604#[derive(Clone, Copy, Debug, PartialEq)]
605pub enum PAD30INPEN_A {
606    #[doc = "0: Pad input disabled"]
607    DIS = 0,
608    #[doc = "1: Pad input enabled"]
609    EN = 1,
610}
611impl From<PAD30INPEN_A> for bool {
612    #[inline(always)]
613    fn from(variant: PAD30INPEN_A) -> Self {
614        variant as u8 != 0
615    }
616}
617#[doc = "Reader of field `PAD30INPEN`"]
618pub type PAD30INPEN_R = crate::R<bool, PAD30INPEN_A>;
619impl PAD30INPEN_R {
620    #[doc = r"Get enumerated values variant"]
621    #[inline(always)]
622    pub fn variant(&self) -> PAD30INPEN_A {
623        match self.bits {
624            false => PAD30INPEN_A::DIS,
625            true => PAD30INPEN_A::EN,
626        }
627    }
628    #[doc = "Checks if the value of the field is `DIS`"]
629    #[inline(always)]
630    pub fn is_dis(&self) -> bool {
631        *self == PAD30INPEN_A::DIS
632    }
633    #[doc = "Checks if the value of the field is `EN`"]
634    #[inline(always)]
635    pub fn is_en(&self) -> bool {
636        *self == PAD30INPEN_A::EN
637    }
638}
639#[doc = "Write proxy for field `PAD30INPEN`"]
640pub struct PAD30INPEN_W<'a> {
641    w: &'a mut W,
642}
643impl<'a> PAD30INPEN_W<'a> {
644    #[doc = r"Writes `variant` to the field"]
645    #[inline(always)]
646    pub fn variant(self, variant: PAD30INPEN_A) -> &'a mut W {
647        {
648            self.bit(variant.into())
649        }
650    }
651    #[doc = "Pad input disabled"]
652    #[inline(always)]
653    pub fn dis(self) -> &'a mut W {
654        self.variant(PAD30INPEN_A::DIS)
655    }
656    #[doc = "Pad input enabled"]
657    #[inline(always)]
658    pub fn en(self) -> &'a mut W {
659        self.variant(PAD30INPEN_A::EN)
660    }
661    #[doc = r"Sets the field bit"]
662    #[inline(always)]
663    pub fn set_bit(self) -> &'a mut W {
664        self.bit(true)
665    }
666    #[doc = r"Clears the field bit"]
667    #[inline(always)]
668    pub fn clear_bit(self) -> &'a mut W {
669        self.bit(false)
670    }
671    #[doc = r"Writes raw bits to the field"]
672    #[inline(always)]
673    pub fn bit(self, value: bool) -> &'a mut W {
674        self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
675        self.w
676    }
677}
678#[doc = "Pad 30 pullup enable\n\nValue on reset: 0"]
679#[derive(Clone, Copy, Debug, PartialEq)]
680pub enum PAD30PULL_A {
681    #[doc = "0: Pullup disabled"]
682    DIS = 0,
683    #[doc = "1: Pullup enabled"]
684    EN = 1,
685}
686impl From<PAD30PULL_A> for bool {
687    #[inline(always)]
688    fn from(variant: PAD30PULL_A) -> Self {
689        variant as u8 != 0
690    }
691}
692#[doc = "Reader of field `PAD30PULL`"]
693pub type PAD30PULL_R = crate::R<bool, PAD30PULL_A>;
694impl PAD30PULL_R {
695    #[doc = r"Get enumerated values variant"]
696    #[inline(always)]
697    pub fn variant(&self) -> PAD30PULL_A {
698        match self.bits {
699            false => PAD30PULL_A::DIS,
700            true => PAD30PULL_A::EN,
701        }
702    }
703    #[doc = "Checks if the value of the field is `DIS`"]
704    #[inline(always)]
705    pub fn is_dis(&self) -> bool {
706        *self == PAD30PULL_A::DIS
707    }
708    #[doc = "Checks if the value of the field is `EN`"]
709    #[inline(always)]
710    pub fn is_en(&self) -> bool {
711        *self == PAD30PULL_A::EN
712    }
713}
714#[doc = "Write proxy for field `PAD30PULL`"]
715pub struct PAD30PULL_W<'a> {
716    w: &'a mut W,
717}
718impl<'a> PAD30PULL_W<'a> {
719    #[doc = r"Writes `variant` to the field"]
720    #[inline(always)]
721    pub fn variant(self, variant: PAD30PULL_A) -> &'a mut W {
722        {
723            self.bit(variant.into())
724        }
725    }
726    #[doc = "Pullup disabled"]
727    #[inline(always)]
728    pub fn dis(self) -> &'a mut W {
729        self.variant(PAD30PULL_A::DIS)
730    }
731    #[doc = "Pullup enabled"]
732    #[inline(always)]
733    pub fn en(self) -> &'a mut W {
734        self.variant(PAD30PULL_A::EN)
735    }
736    #[doc = r"Sets the field bit"]
737    #[inline(always)]
738    pub fn set_bit(self) -> &'a mut W {
739        self.bit(true)
740    }
741    #[doc = r"Clears the field bit"]
742    #[inline(always)]
743    pub fn clear_bit(self) -> &'a mut W {
744        self.bit(false)
745    }
746    #[doc = r"Writes raw bits to the field"]
747    #[inline(always)]
748    pub fn bit(self, value: bool) -> &'a mut W {
749        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
750        self.w
751    }
752}
753#[doc = "Pad 29 function select\n\nValue on reset: 3"]
754#[derive(Clone, Copy, Debug, PartialEq)]
755#[repr(u8)]
756pub enum PAD29FNCSEL_A {
757    #[doc = "0: Configure as the analog input for ADC single ended input 1"]
758    ADCSE1 = 0,
759    #[doc = "1: Configure as the SPI channel 6 nCE signal from IOMSTR1"]
760    M1NCE6 = 1,
761    #[doc = "2: Configure as the input/output signal from CTIMER A2"]
762    TCTA2 = 2,
763    #[doc = "3: Configure as GPIO29"]
764    GPIO29 = 3,
765    #[doc = "4: Configure as the UART0 CTS signal"]
766    UA0CTS = 4,
767    #[doc = "5: Configure as the UART1 CTS signal"]
768    UA1CTS = 5,
769    #[doc = "6: Configure as the SPI channel 0 nCE signal from IOMSTR4"]
770    M4NCE0 = 6,
771    #[doc = "7: Configure as PDM DATA input"]
772    PDM_DATA = 7,
773}
774impl From<PAD29FNCSEL_A> for u8 {
775    #[inline(always)]
776    fn from(variant: PAD29FNCSEL_A) -> Self {
777        variant as _
778    }
779}
780#[doc = "Reader of field `PAD29FNCSEL`"]
781pub type PAD29FNCSEL_R = crate::R<u8, PAD29FNCSEL_A>;
782impl PAD29FNCSEL_R {
783    #[doc = r"Get enumerated values variant"]
784    #[inline(always)]
785    pub fn variant(&self) -> PAD29FNCSEL_A {
786        match self.bits {
787            0 => PAD29FNCSEL_A::ADCSE1,
788            1 => PAD29FNCSEL_A::M1NCE6,
789            2 => PAD29FNCSEL_A::TCTA2,
790            3 => PAD29FNCSEL_A::GPIO29,
791            4 => PAD29FNCSEL_A::UA0CTS,
792            5 => PAD29FNCSEL_A::UA1CTS,
793            6 => PAD29FNCSEL_A::M4NCE0,
794            7 => PAD29FNCSEL_A::PDM_DATA,
795            _ => unreachable!(),
796        }
797    }
798    #[doc = "Checks if the value of the field is `ADCSE1`"]
799    #[inline(always)]
800    pub fn is_adcse1(&self) -> bool {
801        *self == PAD29FNCSEL_A::ADCSE1
802    }
803    #[doc = "Checks if the value of the field is `M1NCE6`"]
804    #[inline(always)]
805    pub fn is_m1n_ce6(&self) -> bool {
806        *self == PAD29FNCSEL_A::M1NCE6
807    }
808    #[doc = "Checks if the value of the field is `TCTA2`"]
809    #[inline(always)]
810    pub fn is_tcta2(&self) -> bool {
811        *self == PAD29FNCSEL_A::TCTA2
812    }
813    #[doc = "Checks if the value of the field is `GPIO29`"]
814    #[inline(always)]
815    pub fn is_gpio29(&self) -> bool {
816        *self == PAD29FNCSEL_A::GPIO29
817    }
818    #[doc = "Checks if the value of the field is `UA0CTS`"]
819    #[inline(always)]
820    pub fn is_ua0cts(&self) -> bool {
821        *self == PAD29FNCSEL_A::UA0CTS
822    }
823    #[doc = "Checks if the value of the field is `UA1CTS`"]
824    #[inline(always)]
825    pub fn is_ua1cts(&self) -> bool {
826        *self == PAD29FNCSEL_A::UA1CTS
827    }
828    #[doc = "Checks if the value of the field is `M4NCE0`"]
829    #[inline(always)]
830    pub fn is_m4n_ce0(&self) -> bool {
831        *self == PAD29FNCSEL_A::M4NCE0
832    }
833    #[doc = "Checks if the value of the field is `PDM_DATA`"]
834    #[inline(always)]
835    pub fn is_pdm_data(&self) -> bool {
836        *self == PAD29FNCSEL_A::PDM_DATA
837    }
838}
839#[doc = "Write proxy for field `PAD29FNCSEL`"]
840pub struct PAD29FNCSEL_W<'a> {
841    w: &'a mut W,
842}
843impl<'a> PAD29FNCSEL_W<'a> {
844    #[doc = r"Writes `variant` to the field"]
845    #[inline(always)]
846    pub fn variant(self, variant: PAD29FNCSEL_A) -> &'a mut W {
847        {
848            self.bits(variant.into())
849        }
850    }
851    #[doc = "Configure as the analog input for ADC single ended input 1"]
852    #[inline(always)]
853    pub fn adcse1(self) -> &'a mut W {
854        self.variant(PAD29FNCSEL_A::ADCSE1)
855    }
856    #[doc = "Configure as the SPI channel 6 nCE signal from IOMSTR1"]
857    #[inline(always)]
858    pub fn m1n_ce6(self) -> &'a mut W {
859        self.variant(PAD29FNCSEL_A::M1NCE6)
860    }
861    #[doc = "Configure as the input/output signal from CTIMER A2"]
862    #[inline(always)]
863    pub fn tcta2(self) -> &'a mut W {
864        self.variant(PAD29FNCSEL_A::TCTA2)
865    }
866    #[doc = "Configure as GPIO29"]
867    #[inline(always)]
868    pub fn gpio29(self) -> &'a mut W {
869        self.variant(PAD29FNCSEL_A::GPIO29)
870    }
871    #[doc = "Configure as the UART0 CTS signal"]
872    #[inline(always)]
873    pub fn ua0cts(self) -> &'a mut W {
874        self.variant(PAD29FNCSEL_A::UA0CTS)
875    }
876    #[doc = "Configure as the UART1 CTS signal"]
877    #[inline(always)]
878    pub fn ua1cts(self) -> &'a mut W {
879        self.variant(PAD29FNCSEL_A::UA1CTS)
880    }
881    #[doc = "Configure as the SPI channel 0 nCE signal from IOMSTR4"]
882    #[inline(always)]
883    pub fn m4n_ce0(self) -> &'a mut W {
884        self.variant(PAD29FNCSEL_A::M4NCE0)
885    }
886    #[doc = "Configure as PDM DATA input"]
887    #[inline(always)]
888    pub fn pdm_data(self) -> &'a mut W {
889        self.variant(PAD29FNCSEL_A::PDM_DATA)
890    }
891    #[doc = r"Writes raw bits to the field"]
892    #[inline(always)]
893    pub fn bits(self, value: u8) -> &'a mut W {
894        self.w.bits = (self.w.bits & !(0x07 << 11)) | (((value as u32) & 0x07) << 11);
895        self.w
896    }
897}
898#[doc = "Pad 29 drive strength\n\nValue on reset: 0"]
899#[derive(Clone, Copy, Debug, PartialEq)]
900pub enum PAD29STRNG_A {
901    #[doc = "0: Low drive strength"]
902    LOW = 0,
903    #[doc = "1: High drive strength"]
904    HIGH = 1,
905}
906impl From<PAD29STRNG_A> for bool {
907    #[inline(always)]
908    fn from(variant: PAD29STRNG_A) -> Self {
909        variant as u8 != 0
910    }
911}
912#[doc = "Reader of field `PAD29STRNG`"]
913pub type PAD29STRNG_R = crate::R<bool, PAD29STRNG_A>;
914impl PAD29STRNG_R {
915    #[doc = r"Get enumerated values variant"]
916    #[inline(always)]
917    pub fn variant(&self) -> PAD29STRNG_A {
918        match self.bits {
919            false => PAD29STRNG_A::LOW,
920            true => PAD29STRNG_A::HIGH,
921        }
922    }
923    #[doc = "Checks if the value of the field is `LOW`"]
924    #[inline(always)]
925    pub fn is_low(&self) -> bool {
926        *self == PAD29STRNG_A::LOW
927    }
928    #[doc = "Checks if the value of the field is `HIGH`"]
929    #[inline(always)]
930    pub fn is_high(&self) -> bool {
931        *self == PAD29STRNG_A::HIGH
932    }
933}
934#[doc = "Write proxy for field `PAD29STRNG`"]
935pub struct PAD29STRNG_W<'a> {
936    w: &'a mut W,
937}
938impl<'a> PAD29STRNG_W<'a> {
939    #[doc = r"Writes `variant` to the field"]
940    #[inline(always)]
941    pub fn variant(self, variant: PAD29STRNG_A) -> &'a mut W {
942        {
943            self.bit(variant.into())
944        }
945    }
946    #[doc = "Low drive strength"]
947    #[inline(always)]
948    pub fn low(self) -> &'a mut W {
949        self.variant(PAD29STRNG_A::LOW)
950    }
951    #[doc = "High drive strength"]
952    #[inline(always)]
953    pub fn high(self) -> &'a mut W {
954        self.variant(PAD29STRNG_A::HIGH)
955    }
956    #[doc = r"Sets the field bit"]
957    #[inline(always)]
958    pub fn set_bit(self) -> &'a mut W {
959        self.bit(true)
960    }
961    #[doc = r"Clears the field bit"]
962    #[inline(always)]
963    pub fn clear_bit(self) -> &'a mut W {
964        self.bit(false)
965    }
966    #[doc = r"Writes raw bits to the field"]
967    #[inline(always)]
968    pub fn bit(self, value: bool) -> &'a mut W {
969        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
970        self.w
971    }
972}
973#[doc = "Pad 29 input enable\n\nValue on reset: 0"]
974#[derive(Clone, Copy, Debug, PartialEq)]
975pub enum PAD29INPEN_A {
976    #[doc = "0: Pad input disabled"]
977    DIS = 0,
978    #[doc = "1: Pad input enabled"]
979    EN = 1,
980}
981impl From<PAD29INPEN_A> for bool {
982    #[inline(always)]
983    fn from(variant: PAD29INPEN_A) -> Self {
984        variant as u8 != 0
985    }
986}
987#[doc = "Reader of field `PAD29INPEN`"]
988pub type PAD29INPEN_R = crate::R<bool, PAD29INPEN_A>;
989impl PAD29INPEN_R {
990    #[doc = r"Get enumerated values variant"]
991    #[inline(always)]
992    pub fn variant(&self) -> PAD29INPEN_A {
993        match self.bits {
994            false => PAD29INPEN_A::DIS,
995            true => PAD29INPEN_A::EN,
996        }
997    }
998    #[doc = "Checks if the value of the field is `DIS`"]
999    #[inline(always)]
1000    pub fn is_dis(&self) -> bool {
1001        *self == PAD29INPEN_A::DIS
1002    }
1003    #[doc = "Checks if the value of the field is `EN`"]
1004    #[inline(always)]
1005    pub fn is_en(&self) -> bool {
1006        *self == PAD29INPEN_A::EN
1007    }
1008}
1009#[doc = "Write proxy for field `PAD29INPEN`"]
1010pub struct PAD29INPEN_W<'a> {
1011    w: &'a mut W,
1012}
1013impl<'a> PAD29INPEN_W<'a> {
1014    #[doc = r"Writes `variant` to the field"]
1015    #[inline(always)]
1016    pub fn variant(self, variant: PAD29INPEN_A) -> &'a mut W {
1017        {
1018            self.bit(variant.into())
1019        }
1020    }
1021    #[doc = "Pad input disabled"]
1022    #[inline(always)]
1023    pub fn dis(self) -> &'a mut W {
1024        self.variant(PAD29INPEN_A::DIS)
1025    }
1026    #[doc = "Pad input enabled"]
1027    #[inline(always)]
1028    pub fn en(self) -> &'a mut W {
1029        self.variant(PAD29INPEN_A::EN)
1030    }
1031    #[doc = r"Sets the field bit"]
1032    #[inline(always)]
1033    pub fn set_bit(self) -> &'a mut W {
1034        self.bit(true)
1035    }
1036    #[doc = r"Clears the field bit"]
1037    #[inline(always)]
1038    pub fn clear_bit(self) -> &'a mut W {
1039        self.bit(false)
1040    }
1041    #[doc = r"Writes raw bits to the field"]
1042    #[inline(always)]
1043    pub fn bit(self, value: bool) -> &'a mut W {
1044        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
1045        self.w
1046    }
1047}
1048#[doc = "Pad 29 pullup enable\n\nValue on reset: 0"]
1049#[derive(Clone, Copy, Debug, PartialEq)]
1050pub enum PAD29PULL_A {
1051    #[doc = "0: Pullup disabled"]
1052    DIS = 0,
1053    #[doc = "1: Pullup enabled"]
1054    EN = 1,
1055}
1056impl From<PAD29PULL_A> for bool {
1057    #[inline(always)]
1058    fn from(variant: PAD29PULL_A) -> Self {
1059        variant as u8 != 0
1060    }
1061}
1062#[doc = "Reader of field `PAD29PULL`"]
1063pub type PAD29PULL_R = crate::R<bool, PAD29PULL_A>;
1064impl PAD29PULL_R {
1065    #[doc = r"Get enumerated values variant"]
1066    #[inline(always)]
1067    pub fn variant(&self) -> PAD29PULL_A {
1068        match self.bits {
1069            false => PAD29PULL_A::DIS,
1070            true => PAD29PULL_A::EN,
1071        }
1072    }
1073    #[doc = "Checks if the value of the field is `DIS`"]
1074    #[inline(always)]
1075    pub fn is_dis(&self) -> bool {
1076        *self == PAD29PULL_A::DIS
1077    }
1078    #[doc = "Checks if the value of the field is `EN`"]
1079    #[inline(always)]
1080    pub fn is_en(&self) -> bool {
1081        *self == PAD29PULL_A::EN
1082    }
1083}
1084#[doc = "Write proxy for field `PAD29PULL`"]
1085pub struct PAD29PULL_W<'a> {
1086    w: &'a mut W,
1087}
1088impl<'a> PAD29PULL_W<'a> {
1089    #[doc = r"Writes `variant` to the field"]
1090    #[inline(always)]
1091    pub fn variant(self, variant: PAD29PULL_A) -> &'a mut W {
1092        {
1093            self.bit(variant.into())
1094        }
1095    }
1096    #[doc = "Pullup disabled"]
1097    #[inline(always)]
1098    pub fn dis(self) -> &'a mut W {
1099        self.variant(PAD29PULL_A::DIS)
1100    }
1101    #[doc = "Pullup enabled"]
1102    #[inline(always)]
1103    pub fn en(self) -> &'a mut W {
1104        self.variant(PAD29PULL_A::EN)
1105    }
1106    #[doc = r"Sets the field bit"]
1107    #[inline(always)]
1108    pub fn set_bit(self) -> &'a mut W {
1109        self.bit(true)
1110    }
1111    #[doc = r"Clears the field bit"]
1112    #[inline(always)]
1113    pub fn clear_bit(self) -> &'a mut W {
1114        self.bit(false)
1115    }
1116    #[doc = r"Writes raw bits to the field"]
1117    #[inline(always)]
1118    pub fn bit(self, value: bool) -> &'a mut W {
1119        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
1120        self.w
1121    }
1122}
1123#[doc = "Pad 28 function select\n\nValue on reset: 3"]
1124#[derive(Clone, Copy, Debug, PartialEq)]
1125#[repr(u8)]
1126pub enum PAD28FNCSEL_A {
1127    #[doc = "0: Configure as the I2S Word Clock input"]
1128    I2S_WCLK = 0,
1129    #[doc = "1: Configure as the SPI channel 5 nCE signal from IOMSTR1"]
1130    M1NCE5 = 1,
1131    #[doc = "2: Configure as the input/output signal from CTIMER B1"]
1132    TCTB1 = 2,
1133    #[doc = "3: Configure as GPIO28"]
1134    GPIO28 = 3,
1135    #[doc = "4: Configure as the IOMSTR2 SPI 3-wire MOSI/MISO signal"]
1136    M2WIR3 = 4,
1137    #[doc = "5: Configure as the IOMSTR2 SPI MOSI output signal"]
1138    M2MOSI = 5,
1139    #[doc = "6: Configure as the SPI channel 3 nCE signal from IOMSTR5"]
1140    M5NCE3 = 6,
1141    #[doc = "7: Configure as the IOMSTR2 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE"]
1142    SLWIR3LB = 7,
1143}
1144impl From<PAD28FNCSEL_A> for u8 {
1145    #[inline(always)]
1146    fn from(variant: PAD28FNCSEL_A) -> Self {
1147        variant as _
1148    }
1149}
1150#[doc = "Reader of field `PAD28FNCSEL`"]
1151pub type PAD28FNCSEL_R = crate::R<u8, PAD28FNCSEL_A>;
1152impl PAD28FNCSEL_R {
1153    #[doc = r"Get enumerated values variant"]
1154    #[inline(always)]
1155    pub fn variant(&self) -> PAD28FNCSEL_A {
1156        match self.bits {
1157            0 => PAD28FNCSEL_A::I2S_WCLK,
1158            1 => PAD28FNCSEL_A::M1NCE5,
1159            2 => PAD28FNCSEL_A::TCTB1,
1160            3 => PAD28FNCSEL_A::GPIO28,
1161            4 => PAD28FNCSEL_A::M2WIR3,
1162            5 => PAD28FNCSEL_A::M2MOSI,
1163            6 => PAD28FNCSEL_A::M5NCE3,
1164            7 => PAD28FNCSEL_A::SLWIR3LB,
1165            _ => unreachable!(),
1166        }
1167    }
1168    #[doc = "Checks if the value of the field is `I2S_WCLK`"]
1169    #[inline(always)]
1170    pub fn is_i2s_wclk(&self) -> bool {
1171        *self == PAD28FNCSEL_A::I2S_WCLK
1172    }
1173    #[doc = "Checks if the value of the field is `M1NCE5`"]
1174    #[inline(always)]
1175    pub fn is_m1n_ce5(&self) -> bool {
1176        *self == PAD28FNCSEL_A::M1NCE5
1177    }
1178    #[doc = "Checks if the value of the field is `TCTB1`"]
1179    #[inline(always)]
1180    pub fn is_tctb1(&self) -> bool {
1181        *self == PAD28FNCSEL_A::TCTB1
1182    }
1183    #[doc = "Checks if the value of the field is `GPIO28`"]
1184    #[inline(always)]
1185    pub fn is_gpio28(&self) -> bool {
1186        *self == PAD28FNCSEL_A::GPIO28
1187    }
1188    #[doc = "Checks if the value of the field is `M2WIR3`"]
1189    #[inline(always)]
1190    pub fn is_m2wir3(&self) -> bool {
1191        *self == PAD28FNCSEL_A::M2WIR3
1192    }
1193    #[doc = "Checks if the value of the field is `M2MOSI`"]
1194    #[inline(always)]
1195    pub fn is_m2mosi(&self) -> bool {
1196        *self == PAD28FNCSEL_A::M2MOSI
1197    }
1198    #[doc = "Checks if the value of the field is `M5NCE3`"]
1199    #[inline(always)]
1200    pub fn is_m5n_ce3(&self) -> bool {
1201        *self == PAD28FNCSEL_A::M5NCE3
1202    }
1203    #[doc = "Checks if the value of the field is `SLWIR3LB`"]
1204    #[inline(always)]
1205    pub fn is_slwir3lb(&self) -> bool {
1206        *self == PAD28FNCSEL_A::SLWIR3LB
1207    }
1208}
1209#[doc = "Write proxy for field `PAD28FNCSEL`"]
1210pub struct PAD28FNCSEL_W<'a> {
1211    w: &'a mut W,
1212}
1213impl<'a> PAD28FNCSEL_W<'a> {
1214    #[doc = r"Writes `variant` to the field"]
1215    #[inline(always)]
1216    pub fn variant(self, variant: PAD28FNCSEL_A) -> &'a mut W {
1217        {
1218            self.bits(variant.into())
1219        }
1220    }
1221    #[doc = "Configure as the I2S Word Clock input"]
1222    #[inline(always)]
1223    pub fn i2s_wclk(self) -> &'a mut W {
1224        self.variant(PAD28FNCSEL_A::I2S_WCLK)
1225    }
1226    #[doc = "Configure as the SPI channel 5 nCE signal from IOMSTR1"]
1227    #[inline(always)]
1228    pub fn m1n_ce5(self) -> &'a mut W {
1229        self.variant(PAD28FNCSEL_A::M1NCE5)
1230    }
1231    #[doc = "Configure as the input/output signal from CTIMER B1"]
1232    #[inline(always)]
1233    pub fn tctb1(self) -> &'a mut W {
1234        self.variant(PAD28FNCSEL_A::TCTB1)
1235    }
1236    #[doc = "Configure as GPIO28"]
1237    #[inline(always)]
1238    pub fn gpio28(self) -> &'a mut W {
1239        self.variant(PAD28FNCSEL_A::GPIO28)
1240    }
1241    #[doc = "Configure as the IOMSTR2 SPI 3-wire MOSI/MISO signal"]
1242    #[inline(always)]
1243    pub fn m2wir3(self) -> &'a mut W {
1244        self.variant(PAD28FNCSEL_A::M2WIR3)
1245    }
1246    #[doc = "Configure as the IOMSTR2 SPI MOSI output signal"]
1247    #[inline(always)]
1248    pub fn m2mosi(self) -> &'a mut W {
1249        self.variant(PAD28FNCSEL_A::M2MOSI)
1250    }
1251    #[doc = "Configure as the SPI channel 3 nCE signal from IOMSTR5"]
1252    #[inline(always)]
1253    pub fn m5n_ce3(self) -> &'a mut W {
1254        self.variant(PAD28FNCSEL_A::M5NCE3)
1255    }
1256    #[doc = "Configure as the IOMSTR2 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE"]
1257    #[inline(always)]
1258    pub fn slwir3lb(self) -> &'a mut W {
1259        self.variant(PAD28FNCSEL_A::SLWIR3LB)
1260    }
1261    #[doc = r"Writes raw bits to the field"]
1262    #[inline(always)]
1263    pub fn bits(self, value: u8) -> &'a mut W {
1264        self.w.bits = (self.w.bits & !(0x07 << 3)) | (((value as u32) & 0x07) << 3);
1265        self.w
1266    }
1267}
1268#[doc = "Pad 28 drive strength\n\nValue on reset: 0"]
1269#[derive(Clone, Copy, Debug, PartialEq)]
1270pub enum PAD28STRNG_A {
1271    #[doc = "0: Low drive strength"]
1272    LOW = 0,
1273    #[doc = "1: High drive strength"]
1274    HIGH = 1,
1275}
1276impl From<PAD28STRNG_A> for bool {
1277    #[inline(always)]
1278    fn from(variant: PAD28STRNG_A) -> Self {
1279        variant as u8 != 0
1280    }
1281}
1282#[doc = "Reader of field `PAD28STRNG`"]
1283pub type PAD28STRNG_R = crate::R<bool, PAD28STRNG_A>;
1284impl PAD28STRNG_R {
1285    #[doc = r"Get enumerated values variant"]
1286    #[inline(always)]
1287    pub fn variant(&self) -> PAD28STRNG_A {
1288        match self.bits {
1289            false => PAD28STRNG_A::LOW,
1290            true => PAD28STRNG_A::HIGH,
1291        }
1292    }
1293    #[doc = "Checks if the value of the field is `LOW`"]
1294    #[inline(always)]
1295    pub fn is_low(&self) -> bool {
1296        *self == PAD28STRNG_A::LOW
1297    }
1298    #[doc = "Checks if the value of the field is `HIGH`"]
1299    #[inline(always)]
1300    pub fn is_high(&self) -> bool {
1301        *self == PAD28STRNG_A::HIGH
1302    }
1303}
1304#[doc = "Write proxy for field `PAD28STRNG`"]
1305pub struct PAD28STRNG_W<'a> {
1306    w: &'a mut W,
1307}
1308impl<'a> PAD28STRNG_W<'a> {
1309    #[doc = r"Writes `variant` to the field"]
1310    #[inline(always)]
1311    pub fn variant(self, variant: PAD28STRNG_A) -> &'a mut W {
1312        {
1313            self.bit(variant.into())
1314        }
1315    }
1316    #[doc = "Low drive strength"]
1317    #[inline(always)]
1318    pub fn low(self) -> &'a mut W {
1319        self.variant(PAD28STRNG_A::LOW)
1320    }
1321    #[doc = "High drive strength"]
1322    #[inline(always)]
1323    pub fn high(self) -> &'a mut W {
1324        self.variant(PAD28STRNG_A::HIGH)
1325    }
1326    #[doc = r"Sets the field bit"]
1327    #[inline(always)]
1328    pub fn set_bit(self) -> &'a mut W {
1329        self.bit(true)
1330    }
1331    #[doc = r"Clears the field bit"]
1332    #[inline(always)]
1333    pub fn clear_bit(self) -> &'a mut W {
1334        self.bit(false)
1335    }
1336    #[doc = r"Writes raw bits to the field"]
1337    #[inline(always)]
1338    pub fn bit(self, value: bool) -> &'a mut W {
1339        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
1340        self.w
1341    }
1342}
1343#[doc = "Pad 28 input enable\n\nValue on reset: 0"]
1344#[derive(Clone, Copy, Debug, PartialEq)]
1345pub enum PAD28INPEN_A {
1346    #[doc = "0: Pad input disabled"]
1347    DIS = 0,
1348    #[doc = "1: Pad input enabled"]
1349    EN = 1,
1350}
1351impl From<PAD28INPEN_A> for bool {
1352    #[inline(always)]
1353    fn from(variant: PAD28INPEN_A) -> Self {
1354        variant as u8 != 0
1355    }
1356}
1357#[doc = "Reader of field `PAD28INPEN`"]
1358pub type PAD28INPEN_R = crate::R<bool, PAD28INPEN_A>;
1359impl PAD28INPEN_R {
1360    #[doc = r"Get enumerated values variant"]
1361    #[inline(always)]
1362    pub fn variant(&self) -> PAD28INPEN_A {
1363        match self.bits {
1364            false => PAD28INPEN_A::DIS,
1365            true => PAD28INPEN_A::EN,
1366        }
1367    }
1368    #[doc = "Checks if the value of the field is `DIS`"]
1369    #[inline(always)]
1370    pub fn is_dis(&self) -> bool {
1371        *self == PAD28INPEN_A::DIS
1372    }
1373    #[doc = "Checks if the value of the field is `EN`"]
1374    #[inline(always)]
1375    pub fn is_en(&self) -> bool {
1376        *self == PAD28INPEN_A::EN
1377    }
1378}
1379#[doc = "Write proxy for field `PAD28INPEN`"]
1380pub struct PAD28INPEN_W<'a> {
1381    w: &'a mut W,
1382}
1383impl<'a> PAD28INPEN_W<'a> {
1384    #[doc = r"Writes `variant` to the field"]
1385    #[inline(always)]
1386    pub fn variant(self, variant: PAD28INPEN_A) -> &'a mut W {
1387        {
1388            self.bit(variant.into())
1389        }
1390    }
1391    #[doc = "Pad input disabled"]
1392    #[inline(always)]
1393    pub fn dis(self) -> &'a mut W {
1394        self.variant(PAD28INPEN_A::DIS)
1395    }
1396    #[doc = "Pad input enabled"]
1397    #[inline(always)]
1398    pub fn en(self) -> &'a mut W {
1399        self.variant(PAD28INPEN_A::EN)
1400    }
1401    #[doc = r"Sets the field bit"]
1402    #[inline(always)]
1403    pub fn set_bit(self) -> &'a mut W {
1404        self.bit(true)
1405    }
1406    #[doc = r"Clears the field bit"]
1407    #[inline(always)]
1408    pub fn clear_bit(self) -> &'a mut W {
1409        self.bit(false)
1410    }
1411    #[doc = r"Writes raw bits to the field"]
1412    #[inline(always)]
1413    pub fn bit(self, value: bool) -> &'a mut W {
1414        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
1415        self.w
1416    }
1417}
1418#[doc = "Pad 28 pullup enable\n\nValue on reset: 0"]
1419#[derive(Clone, Copy, Debug, PartialEq)]
1420pub enum PAD28PULL_A {
1421    #[doc = "0: Pullup disabled"]
1422    DIS = 0,
1423    #[doc = "1: Pullup enabled"]
1424    EN = 1,
1425}
1426impl From<PAD28PULL_A> for bool {
1427    #[inline(always)]
1428    fn from(variant: PAD28PULL_A) -> Self {
1429        variant as u8 != 0
1430    }
1431}
1432#[doc = "Reader of field `PAD28PULL`"]
1433pub type PAD28PULL_R = crate::R<bool, PAD28PULL_A>;
1434impl PAD28PULL_R {
1435    #[doc = r"Get enumerated values variant"]
1436    #[inline(always)]
1437    pub fn variant(&self) -> PAD28PULL_A {
1438        match self.bits {
1439            false => PAD28PULL_A::DIS,
1440            true => PAD28PULL_A::EN,
1441        }
1442    }
1443    #[doc = "Checks if the value of the field is `DIS`"]
1444    #[inline(always)]
1445    pub fn is_dis(&self) -> bool {
1446        *self == PAD28PULL_A::DIS
1447    }
1448    #[doc = "Checks if the value of the field is `EN`"]
1449    #[inline(always)]
1450    pub fn is_en(&self) -> bool {
1451        *self == PAD28PULL_A::EN
1452    }
1453}
1454#[doc = "Write proxy for field `PAD28PULL`"]
1455pub struct PAD28PULL_W<'a> {
1456    w: &'a mut W,
1457}
1458impl<'a> PAD28PULL_W<'a> {
1459    #[doc = r"Writes `variant` to the field"]
1460    #[inline(always)]
1461    pub fn variant(self, variant: PAD28PULL_A) -> &'a mut W {
1462        {
1463            self.bit(variant.into())
1464        }
1465    }
1466    #[doc = "Pullup disabled"]
1467    #[inline(always)]
1468    pub fn dis(self) -> &'a mut W {
1469        self.variant(PAD28PULL_A::DIS)
1470    }
1471    #[doc = "Pullup enabled"]
1472    #[inline(always)]
1473    pub fn en(self) -> &'a mut W {
1474        self.variant(PAD28PULL_A::EN)
1475    }
1476    #[doc = r"Sets the field bit"]
1477    #[inline(always)]
1478    pub fn set_bit(self) -> &'a mut W {
1479        self.bit(true)
1480    }
1481    #[doc = r"Clears the field bit"]
1482    #[inline(always)]
1483    pub fn clear_bit(self) -> &'a mut W {
1484        self.bit(false)
1485    }
1486    #[doc = r"Writes raw bits to the field"]
1487    #[inline(always)]
1488    pub fn bit(self, value: bool) -> &'a mut W {
1489        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
1490        self.w
1491    }
1492}
1493impl R {
1494    #[doc = "Bits 27:29 - Pad 31 function select"]
1495    #[inline(always)]
1496    pub fn pad31fncsel(&self) -> PAD31FNCSEL_R {
1497        PAD31FNCSEL_R::new(((self.bits >> 27) & 0x07) as u8)
1498    }
1499    #[doc = "Bit 26 - Pad 31 drive strength"]
1500    #[inline(always)]
1501    pub fn pad31strng(&self) -> PAD31STRNG_R {
1502        PAD31STRNG_R::new(((self.bits >> 26) & 0x01) != 0)
1503    }
1504    #[doc = "Bit 25 - Pad 31 input enable"]
1505    #[inline(always)]
1506    pub fn pad31inpen(&self) -> PAD31INPEN_R {
1507        PAD31INPEN_R::new(((self.bits >> 25) & 0x01) != 0)
1508    }
1509    #[doc = "Bit 24 - Pad 31 pullup enable"]
1510    #[inline(always)]
1511    pub fn pad31pull(&self) -> PAD31PULL_R {
1512        PAD31PULL_R::new(((self.bits >> 24) & 0x01) != 0)
1513    }
1514    #[doc = "Bits 19:21 - Pad 30 function select"]
1515    #[inline(always)]
1516    pub fn pad30fncsel(&self) -> PAD30FNCSEL_R {
1517        PAD30FNCSEL_R::new(((self.bits >> 19) & 0x07) as u8)
1518    }
1519    #[doc = "Bit 18 - Pad 30 drive strength"]
1520    #[inline(always)]
1521    pub fn pad30strng(&self) -> PAD30STRNG_R {
1522        PAD30STRNG_R::new(((self.bits >> 18) & 0x01) != 0)
1523    }
1524    #[doc = "Bit 17 - Pad 30 input enable"]
1525    #[inline(always)]
1526    pub fn pad30inpen(&self) -> PAD30INPEN_R {
1527        PAD30INPEN_R::new(((self.bits >> 17) & 0x01) != 0)
1528    }
1529    #[doc = "Bit 16 - Pad 30 pullup enable"]
1530    #[inline(always)]
1531    pub fn pad30pull(&self) -> PAD30PULL_R {
1532        PAD30PULL_R::new(((self.bits >> 16) & 0x01) != 0)
1533    }
1534    #[doc = "Bits 11:13 - Pad 29 function select"]
1535    #[inline(always)]
1536    pub fn pad29fncsel(&self) -> PAD29FNCSEL_R {
1537        PAD29FNCSEL_R::new(((self.bits >> 11) & 0x07) as u8)
1538    }
1539    #[doc = "Bit 10 - Pad 29 drive strength"]
1540    #[inline(always)]
1541    pub fn pad29strng(&self) -> PAD29STRNG_R {
1542        PAD29STRNG_R::new(((self.bits >> 10) & 0x01) != 0)
1543    }
1544    #[doc = "Bit 9 - Pad 29 input enable"]
1545    #[inline(always)]
1546    pub fn pad29inpen(&self) -> PAD29INPEN_R {
1547        PAD29INPEN_R::new(((self.bits >> 9) & 0x01) != 0)
1548    }
1549    #[doc = "Bit 8 - Pad 29 pullup enable"]
1550    #[inline(always)]
1551    pub fn pad29pull(&self) -> PAD29PULL_R {
1552        PAD29PULL_R::new(((self.bits >> 8) & 0x01) != 0)
1553    }
1554    #[doc = "Bits 3:5 - Pad 28 function select"]
1555    #[inline(always)]
1556    pub fn pad28fncsel(&self) -> PAD28FNCSEL_R {
1557        PAD28FNCSEL_R::new(((self.bits >> 3) & 0x07) as u8)
1558    }
1559    #[doc = "Bit 2 - Pad 28 drive strength"]
1560    #[inline(always)]
1561    pub fn pad28strng(&self) -> PAD28STRNG_R {
1562        PAD28STRNG_R::new(((self.bits >> 2) & 0x01) != 0)
1563    }
1564    #[doc = "Bit 1 - Pad 28 input enable"]
1565    #[inline(always)]
1566    pub fn pad28inpen(&self) -> PAD28INPEN_R {
1567        PAD28INPEN_R::new(((self.bits >> 1) & 0x01) != 0)
1568    }
1569    #[doc = "Bit 0 - Pad 28 pullup enable"]
1570    #[inline(always)]
1571    pub fn pad28pull(&self) -> PAD28PULL_R {
1572        PAD28PULL_R::new((self.bits & 0x01) != 0)
1573    }
1574}
1575impl W {
1576    #[doc = "Bits 27:29 - Pad 31 function select"]
1577    #[inline(always)]
1578    pub fn pad31fncsel(&mut self) -> PAD31FNCSEL_W {
1579        PAD31FNCSEL_W { w: self }
1580    }
1581    #[doc = "Bit 26 - Pad 31 drive strength"]
1582    #[inline(always)]
1583    pub fn pad31strng(&mut self) -> PAD31STRNG_W {
1584        PAD31STRNG_W { w: self }
1585    }
1586    #[doc = "Bit 25 - Pad 31 input enable"]
1587    #[inline(always)]
1588    pub fn pad31inpen(&mut self) -> PAD31INPEN_W {
1589        PAD31INPEN_W { w: self }
1590    }
1591    #[doc = "Bit 24 - Pad 31 pullup enable"]
1592    #[inline(always)]
1593    pub fn pad31pull(&mut self) -> PAD31PULL_W {
1594        PAD31PULL_W { w: self }
1595    }
1596    #[doc = "Bits 19:21 - Pad 30 function select"]
1597    #[inline(always)]
1598    pub fn pad30fncsel(&mut self) -> PAD30FNCSEL_W {
1599        PAD30FNCSEL_W { w: self }
1600    }
1601    #[doc = "Bit 18 - Pad 30 drive strength"]
1602    #[inline(always)]
1603    pub fn pad30strng(&mut self) -> PAD30STRNG_W {
1604        PAD30STRNG_W { w: self }
1605    }
1606    #[doc = "Bit 17 - Pad 30 input enable"]
1607    #[inline(always)]
1608    pub fn pad30inpen(&mut self) -> PAD30INPEN_W {
1609        PAD30INPEN_W { w: self }
1610    }
1611    #[doc = "Bit 16 - Pad 30 pullup enable"]
1612    #[inline(always)]
1613    pub fn pad30pull(&mut self) -> PAD30PULL_W {
1614        PAD30PULL_W { w: self }
1615    }
1616    #[doc = "Bits 11:13 - Pad 29 function select"]
1617    #[inline(always)]
1618    pub fn pad29fncsel(&mut self) -> PAD29FNCSEL_W {
1619        PAD29FNCSEL_W { w: self }
1620    }
1621    #[doc = "Bit 10 - Pad 29 drive strength"]
1622    #[inline(always)]
1623    pub fn pad29strng(&mut self) -> PAD29STRNG_W {
1624        PAD29STRNG_W { w: self }
1625    }
1626    #[doc = "Bit 9 - Pad 29 input enable"]
1627    #[inline(always)]
1628    pub fn pad29inpen(&mut self) -> PAD29INPEN_W {
1629        PAD29INPEN_W { w: self }
1630    }
1631    #[doc = "Bit 8 - Pad 29 pullup enable"]
1632    #[inline(always)]
1633    pub fn pad29pull(&mut self) -> PAD29PULL_W {
1634        PAD29PULL_W { w: self }
1635    }
1636    #[doc = "Bits 3:5 - Pad 28 function select"]
1637    #[inline(always)]
1638    pub fn pad28fncsel(&mut self) -> PAD28FNCSEL_W {
1639        PAD28FNCSEL_W { w: self }
1640    }
1641    #[doc = "Bit 2 - Pad 28 drive strength"]
1642    #[inline(always)]
1643    pub fn pad28strng(&mut self) -> PAD28STRNG_W {
1644        PAD28STRNG_W { w: self }
1645    }
1646    #[doc = "Bit 1 - Pad 28 input enable"]
1647    #[inline(always)]
1648    pub fn pad28inpen(&mut self) -> PAD28INPEN_W {
1649        PAD28INPEN_W { w: self }
1650    }
1651    #[doc = "Bit 0 - Pad 28 pullup enable"]
1652    #[inline(always)]
1653    pub fn pad28pull(&mut self) -> PAD28PULL_W {
1654        PAD28PULL_W { w: self }
1655    }
1656}
ambiq_apollo2_pac/gpio/padregh.rs

ambiq_apollo2_pac/gpio/
padregh.rs
