ambiq_apollo1_pac/mcuctrl/
faultcaptureen.rs

1#[doc = "Reader of register FAULTCAPTUREEN"]
2pub type R = crate::R<u32, super::FAULTCAPTUREEN>;
3#[doc = "Writer for register FAULTCAPTUREEN"]
4pub type W = crate::W<u32, super::FAULTCAPTUREEN>;
5#[doc = "Register FAULTCAPTUREEN `reset()`'s with value 0"]
6impl crate::ResetValue for super::FAULTCAPTUREEN {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Fault Capture Enable field. When set, the Fault Capture monitors are enabled and addresses which generate a hard fault are captured into the FAULTADDR registers.\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum ENABLE_A {
16    #[doc = "0: Disable fault capture."]
17    DIS = 0,
18    #[doc = "1: Enable fault capture."]
19    EN = 1,
20}
21impl From<ENABLE_A> for bool {
22    #[inline(always)]
23    fn from(variant: ENABLE_A) -> Self {
24        variant as u8 != 0
25    }
26}
27#[doc = "Reader of field `ENABLE`"]
28pub type ENABLE_R = crate::R<bool, ENABLE_A>;
29impl ENABLE_R {
30    #[doc = r"Get enumerated values variant"]
31    #[inline(always)]
32    pub fn variant(&self) -> ENABLE_A {
33        match self.bits {
34            false => ENABLE_A::DIS,
35            true => ENABLE_A::EN,
36        }
37    }
38    #[doc = "Checks if the value of the field is `DIS`"]
39    #[inline(always)]
40    pub fn is_dis(&self) -> bool {
41        *self == ENABLE_A::DIS
42    }
43    #[doc = "Checks if the value of the field is `EN`"]
44    #[inline(always)]
45    pub fn is_en(&self) -> bool {
46        *self == ENABLE_A::EN
47    }
48}
49#[doc = "Write proxy for field `ENABLE`"]
50pub struct ENABLE_W<'a> {
51    w: &'a mut W,
52}
53impl<'a> ENABLE_W<'a> {
54    #[doc = r"Writes `variant` to the field"]
55    #[inline(always)]
56    pub fn variant(self, variant: ENABLE_A) -> &'a mut W {
57        {
58            self.bit(variant.into())
59        }
60    }
61    #[doc = "Disable fault capture."]
62    #[inline(always)]
63    pub fn dis(self) -> &'a mut W {
64        self.variant(ENABLE_A::DIS)
65    }
66    #[doc = "Enable fault capture."]
67    #[inline(always)]
68    pub fn en(self) -> &'a mut W {
69        self.variant(ENABLE_A::EN)
70    }
71    #[doc = r"Sets the field bit"]
72    #[inline(always)]
73    pub fn set_bit(self) -> &'a mut W {
74        self.bit(true)
75    }
76    #[doc = r"Clears the field bit"]
77    #[inline(always)]
78    pub fn clear_bit(self) -> &'a mut W {
79        self.bit(false)
80    }
81    #[doc = r"Writes raw bits to the field"]
82    #[inline(always)]
83    pub fn bit(self, value: bool) -> &'a mut W {
84        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
85        self.w
86    }
87}
88impl R {
89    #[doc = "Bit 0 - Fault Capture Enable field. When set, the Fault Capture monitors are enabled and addresses which generate a hard fault are captured into the FAULTADDR registers."]
90    #[inline(always)]
91    pub fn enable(&self) -> ENABLE_R {
92        ENABLE_R::new((self.bits & 0x01) != 0)
93    }
94}
95impl W {
96    #[doc = "Bit 0 - Fault Capture Enable field. When set, the Fault Capture monitors are enabled and addresses which generate a hard fault are captured into the FAULTADDR registers."]
97    #[inline(always)]
98    pub fn enable(&mut self) -> ENABLE_W {
99        ENABLE_W { w: self }
100    }
101}
ambiq_apollo1_pac/mcuctrl/faultcaptureen.rs

ambiq_apollo1_pac/mcuctrl/
faultcaptureen.rs
