[−][src]Module ambiq_apollo1_pac::adc::cfg
Configuration Register
Structs
ADCEN_W | Write proxy for field |
BATTLOAD_W | Write proxy for field |
CLKSEL_W | Write proxy for field |
LPMODE_W | Write proxy for field |
OPMODE_W | Write proxy for field |
REFSEL_W | Write proxy for field |
RPTEN_W | Write proxy for field |
TMPSPWR_W | Write proxy for field |
TRIGPOL_W | Write proxy for field |
TRIGSEL_W | Write proxy for field |
Enums
ADCEN_A | This bit enables the ADC module. While the ADC is enabled, the ADCCFG and SLOT Configuration regsiter settings must remain stable and unchanged. |
BATTLOAD_A | Control 500 Ohm battery load resistor. |
CLKSEL_A | Select the source and frequency for the ADC clock. All values not enumerated below are undefined. |
LPMODE_A | Select power mode to enter between active scans. |
OPMODE_A | Select the sample rate mode. It adjusts the current in the ADC for higher sample rates. A 12MHz ADC clock can result in a sample rate up to 1Msps depending on the trigger or repeating mode rate. A 1.5MHz ADC clock can result in a sample rate up 125K sps. NOTE: All other values not specified below are undefined. |
REFSEL_A | Select the ADC reference voltage. |
RPTEN_A | This bit enables Repeating Scan Mode. |
TMPSPWR_A | This enables power to the temperature sensor module. After setting this bit, the temperature sensor will remain powered down while the ADC is power is disconnected (i.e, when the ADC PWDSTAT is 2'b10). |
TRIGPOL_A | This bit selects the ADC trigger polarity for external off chip triggers. |
TRIGSEL_A | Select the ADC trigger source. |
Type Definitions
ADCEN_R | Reader of field |
BATTLOAD_R | Reader of field |
CLKSEL_R | Reader of field |
LPMODE_R | Reader of field |
OPMODE_R | Reader of field |
R | Reader of register CFG |
REFSEL_R | Reader of field |
RPTEN_R | Reader of field |
TMPSPWR_R | Reader of field |
TRIGPOL_R | Reader of field |
TRIGSEL_R | Reader of field |
W | Writer for register CFG |