pub const IO_START: u64 = 0x0fff_0000;
pub const IO_END: u64 = 0x1000_0000;
pub const MMIO_32_START: u64 = 0x1000_0000;
pub const GIC_MSI_START: u64 = 0x1000_0000; pub const GIC_DIST_START: u64 = 0x1003_0000;
pub const GIC_V2_CPU_INTERFACE_START: u64 = 0x1000_4000; pub const GIC_V3_REDIST_START: u64 = 0x1004_0000;
pub const PL031_START: u64 = 0x2fff_e000;
pub const PL011_START: u64 = 0x2fff_f000;
pub const MMIO_32_END: u64 = 0x3000_0000; pub const PCIE_CONFIG_START: u64 = 0x3000_0000;
pub const RAM_32_START: u64 = 0x4000_0000;
pub const DEVICE_TREE_START: u64 = 0x4000_0000; pub const DEVICE_TREE_LIMIT: u64 = 0x20_0000;
pub const KERNEL_IMAGE_START: u64 = 0x4020_0000;
pub const RAM_32_END: u64 = 0xc000_0000; pub const RAM_32_SIZE: u64 = RAM_32_END - RAM_32_START;
pub const PCIE_MMIO_32_PREFETCHABLE_START: u64 = 0xc000_0000; pub const PCIE_MMIO_32_PREFETCHABLE_END: u64 = 0xe000_0000;
pub const PCIE_MMIO_32_NON_PREFETCHABLE_START: u64 = 0xe000_0000; pub const PCIE_MMIO_32_NON_PREFETCHABLE_END: u64 = 0x1_0000_0000;
pub const MEM_64_START: u64 = 0x1_0000_0000; pub const PAGE_SIZE: u64 = 0x1000;