alioth 0.12.0

Core library for Alioth, an experimental Type-2 hypervisor.
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81

// Copyright 2024 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

pub const REAL_MODE_IVT_START: u64 = 0x0;

pub const BIOS_DATA_AREA_START: u64 = 0x400;
pub const BIOS_DATA_END: u64 = 0x500;

pub const BOOT_GDT_START: u64 = 0x500;
pub const BOOT_GDT_LIMIT: u64 = 0x100;
pub const BOOT_IDT_START: u64 = 0x600;
pub const BOOT_IDT_LIMIT: u64 = 0xa00;

pub const LINUX_BOOT_PARAMS_START: u64 = 0x1000; // size: 4KiB
pub const HVM_START_INFO_START: u64 = 0x1000; // size: 4KiB

pub const KERNEL_CMDLINE_START: u64 = 0x2000;
pub const KERNEL_CMDLINE_LIMIT: u64 = 0x1000;

pub const BOOT_PAGING_START: u64 = 0x3000;
pub const BOOT_PAGING_LIMIT: u64 = 0x4000;

pub const EBDA_START: u64 = 0x8_0000;
pub const EBDA_END: u64 = 0xA_0000;

pub const KERNEL_IMAGE_START: u64 = 0x100_0000; // 16 MiB

pub const RAM_32_END: u64 = 0x8000_0000; // 2 GiB
pub const RAM_32_SIZE: u64 = RAM_32_END; // 2 GiB

pub const PCIE_MMIO_32_PREFETCHABLE_START: u64 = 0x8000_0000; // 2 GiB
pub const PCIE_MMIO_32_PREFETCHABLE_END: u64 = 0xa000_0000; // 2.5 GiB, size = 512 MiB

pub const PCIE_MMIO_32_NON_PREFETCHABLE_START: u64 = 0xa000_0000; // 2.5 GiB
pub const PCIE_MMIO_32_NON_PREFETCHABLE_END: u64 = 0xc000_0000; // 3 GiB, size = 512 MiB

pub const MMIO_32_START: u64 = 0xc000_0000; // 3 GiB
pub const MMIO_32_END: u64 = 0xe000_0000; // 3.5 GiB, size = 512 MiB

pub const PCIE_CONFIG_START: u64 = 0xe000_0000; // 3.5 GiB
pub const PCIE_CONFIG_END: u64 = 0xf000_0000; // 3.75 GiB, size = 256 MiB

pub const IOAPIC_START: u64 = 0xfec0_0000;
pub const IOAPIC_END: u64 = IOAPIC_START + 0x100;

pub const APIC_START: u64 = 0xfee0_0000;

pub const MEM_64_START: u64 = 0x1_0000_0000; // 4GiB

pub const PAGE_SIZE: u64 = 0x1000; // 4KiB

pub const PORT_CMOS_REG: u16 = 0x70;
pub const PORT_CMOS_DATA: u16 = 0x71;

pub const PORT_COM1: u16 = 0x3f8;

pub const PORT_FWDBG: u16 = 0x402;

pub const PORT_FW_CFG_SELECTOR: u16 = 0x510;
pub const PORT_FW_CFG_DATA: u16 = 0x511;
pub const PORT_FW_CFG_DMA_HI: u16 = 0x514;
pub const PORT_FW_CFG_DMA_LO: u16 = 0x518;

pub const PORT_ACPI_SLEEP_CONTROL: u16 = 0x600;
pub const PORT_ACPI_SLEEP_STATUS: u16 = 0x601;
pub const PORT_ACPI_RESET: u16 = 0x604;
pub const PORT_ACPI_TIMER: u16 = 0x608;

pub const PORT_PCI_ADDRESS: u16 = 0xcf8;
pub const PORT_PCI_DATA: u16 = 0xcfc;