pub mod VADDL_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11101111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000000000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VADDL_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_OFFSET: u32 = 28u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_WIDTH: u32 = 1u32;
#[inline]
pub const fn VADDL_T1(
U: ::aarchmrs_types::BitValue<1>,
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111u32 << 29u32
| U.into_inner() << 28u32
| 0b11111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0000u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VADDW_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11101111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000000100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VADDW_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_OFFSET: u32 = 28u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_WIDTH: u32 = 1u32;
#[inline]
pub const fn VADDW_T1(
U: ::aarchmrs_types::BitValue<1>,
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111u32 << 29u32
| U.into_inner() << 28u32
| 0b11111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0001u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VSUBL_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11101111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000001000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VSUBL_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_OFFSET: u32 = 28u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_WIDTH: u32 = 1u32;
#[inline]
pub const fn VSUBL_T1(
U: ::aarchmrs_types::BitValue<1>,
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111u32 << 29u32
| U.into_inner() << 28u32
| 0b11111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0010u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VADDHN_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000010000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VADDHN_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VADDHN_T1(
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0100u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VSUBW_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11101111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000001100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VSUBW_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_OFFSET: u32 = 28u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_WIDTH: u32 = 1u32;
#[inline]
pub const fn VSUBW_T1(
U: ::aarchmrs_types::BitValue<1>,
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111u32 << 29u32
| U.into_inner() << 28u32
| 0b11111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0011u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VSUBHN_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000011000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VSUBHN_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VSUBHN_T1(
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0110u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VQDMLAL_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000100100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VQDMLAL_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VQDMLAL_T1(
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VABAL_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11101111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000010100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VABAL_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_OFFSET: u32 = 28u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_WIDTH: u32 = 1u32;
#[inline]
pub const fn VABAL_T1(
U: ::aarchmrs_types::BitValue<1>,
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111u32 << 29u32
| U.into_inner() << 28u32
| 0b11111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0101u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VQDMLSL_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000101100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VQDMLSL_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VQDMLSL_T1(
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VQDMULL_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000110100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VQDMULL_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VQDMULL_T1(
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1101u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VABDL_i_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11101111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000011100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VABDL_i_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_OFFSET: u32 = 28u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_WIDTH: u32 = 1u32;
#[inline]
pub const fn VABDL_i_T1(
U: ::aarchmrs_types::BitValue<1>,
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111u32 << 29u32
| U.into_inner() << 28u32
| 0b11111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0111u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMLAL_i_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11101111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000100000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMLAL_i_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_OFFSET: u32 = 28u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMLAL_i_T1(
U: ::aarchmrs_types::BitValue<1>,
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111u32 << 29u32
| U.into_inner() << 28u32
| 0b11111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1000u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMLSL_i_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11101111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000101000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMLSL_i_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_OFFSET: u32 = 28u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMLSL_i_T1(
U: ::aarchmrs_types::BitValue<1>,
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111u32 << 29u32
| U.into_inner() << 28u32
| 0b11111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VRADDHN_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11111111100000000000010000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VRADDHN_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VRADDHN_T1(
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111111111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0100u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VRSUBHN_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111100000000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11111111100000000000011000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VRSUBHN_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VRSUBHN_T1(
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111111111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b0110u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMULL_i_T1 {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11101111100000000000110101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101111100000000000110000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMULL_i_T1";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_op_OFFSET: u32 = 9u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_op_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_OFFSET: u32 = 20u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_size_WIDTH: u32 = 2u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_OFFSET: u32 = 28u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_U_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMULL_i_T1(
U: ::aarchmrs_types::BitValue<1>,
D: ::aarchmrs_types::BitValue<1>,
size: ::aarchmrs_types::BitValue<2>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
op: ::aarchmrs_types::BitValue<1>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111u32 << 29u32
| U.into_inner() << 28u32
| 0b11111u32 << 23u32
| D.into_inner() << 22u32
| size.into_inner() << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b11u32 << 10u32
| op.into_inner() << 9u32
| 0b0u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}