pub mod VMLA_f_T2_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000000000000100100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMLA_f_T2_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMLA_f_T2_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b00u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMLA_f_T2_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000000000000101000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMLA_f_T2_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMLA_f_T2_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b00u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMLA_f_T2_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000000000000101100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMLA_f_T2_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMLA_f_T2_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b00u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMLS_f_T2_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000000000000100101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMLS_f_T2_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMLS_f_T2_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b00u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMLS_f_T2_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000000000000101001000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMLS_f_T2_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMLS_f_T2_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b00u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMLS_f_T2_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000000000000101101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMLS_f_T2_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMLS_f_T2_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b00u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VNMLS_T1_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000100000000100100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VNMLS_T1_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VNMLS_T1_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VNMLS_T1_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000100000000101000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VNMLS_T1_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VNMLS_T1_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VNMLS_T1_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000100000000101100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VNMLS_T1_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VNMLS_T1_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VNMLA_T1_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000100000000100101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VNMLA_T1_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VNMLA_T1_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VNMLA_T1_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000100000000101001000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VNMLA_T1_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VNMLA_T1_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VNMLA_T1_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110000100000000101101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VNMLA_T1_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VNMLA_T1_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMUL_f_T2_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001000000000100100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMUL_f_T2_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMUL_f_T2_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMUL_f_T2_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001000000000101000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMUL_f_T2_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMUL_f_T2_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VMUL_f_T2_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001000000000101100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VMUL_f_T2_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VMUL_f_T2_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VNMUL_T1_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001000000000100101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VNMUL_T1_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VNMUL_T1_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VNMUL_T1_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001000000000101001000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VNMUL_T1_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VNMUL_T1_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VNMUL_T1_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001000000000101101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VNMUL_T1_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VNMUL_T1_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VADD_f_T2_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001100000000100100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VADD_f_T2_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VADD_f_T2_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b11u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VADD_f_T2_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001100000000101000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VADD_f_T2_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VADD_f_T2_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b11u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VADD_f_T2_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001100000000101100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VADD_f_T2_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VADD_f_T2_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b11u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VSUB_f_T2_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001100000000100101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VSUB_f_T2_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VSUB_f_T2_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b11u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VSUB_f_T2_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001100000000101001000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VSUB_f_T2_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VSUB_f_T2_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b11u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VSUB_f_T2_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110001100000000101101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VSUB_f_T2_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VSUB_f_T2_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011100u32 << 23u32
| D.into_inner() << 22u32
| 0b11u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VDIV_T1_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110100000000000100100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VDIV_T1_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VDIV_T1_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b00u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VDIV_T1_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110100000000000101000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VDIV_T1_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VDIV_T1_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b00u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VDIV_T1_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110100000000000101100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VDIV_T1_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VDIV_T1_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b00u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFNMS_T1_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110100100000000100100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFNMS_T1_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFNMS_T1_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFNMS_T1_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110100100000000101000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFNMS_T1_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFNMS_T1_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFNMS_T1_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110100100000000101100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFNMS_T1_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFNMS_T1_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFNMA_T1_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110100100000000100101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFNMA_T1_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFNMA_T1_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFNMA_T1_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110100100000000101001000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFNMA_T1_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFNMA_T1_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFNMA_T1_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110100100000000101101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFNMA_T1_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFNMA_T1_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b01u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFMA_T2_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110101000000000100100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFMA_T2_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFMA_T2_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFMA_T2_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110101000000000101000000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFMA_T2_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFMA_T2_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFMA_T2_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110101000000000101100000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFMA_T2_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFMA_T2_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b0u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFMS_T2_H {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110101000000000100101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFMS_T2_H";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFMS_T2_H(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1001u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFMS_T2_S {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110101000000000101001000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFMS_T2_S";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFMS_T2_S(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1010u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}
pub mod VFMS_T2_D {
#[cfg(feature = "meta")]
pub const OPCODE_MASK: u32 = 0b11111111101100000000111101010000u32;
#[cfg(feature = "meta")]
pub const OPCODE: u32 = 0b11101110101000000000101101000000u32;
#[cfg(feature = "meta")]
pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32;
#[cfg(feature = "meta")]
pub const NAME: &str = "VFMS_T2_D";
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_OFFSET: u32 = 0u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vm_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_OFFSET: u32 = 5u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_M_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_OFFSET: u32 = 7u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_N_WIDTH: u32 = 1u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_OFFSET: u32 = 12u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vd_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_OFFSET: u32 = 16u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_Vn_WIDTH: u32 = 4u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_OFFSET: u32 = 22u32;
#[cfg(feature = "meta_field")]
#[allow(nonstandard_style)]
pub const FIELD_D_WIDTH: u32 = 1u32;
#[inline]
pub const fn VFMS_T2_D(
D: ::aarchmrs_types::BitValue<1>,
Vn: ::aarchmrs_types::BitValue<4>,
Vd: ::aarchmrs_types::BitValue<4>,
N: ::aarchmrs_types::BitValue<1>,
M: ::aarchmrs_types::BitValue<1>,
Vm: ::aarchmrs_types::BitValue<4>,
) -> ::aarchmrs_types::InstructionCode {
::aarchmrs_types::InstructionCode::from_u32(
0b111011101u32 << 23u32
| D.into_inner() << 22u32
| 0b10u32 << 20u32
| Vn.into_inner() << 16u32
| Vd.into_inner() << 12u32
| 0b1011u32 << 8u32
| N.into_inner() << 7u32
| 0b1u32 << 6u32
| M.into_inner() << 5u32
| 0b0u32 << 4u32
| Vm.into_inner() << 0u32,
)
}
}