aarch64_cpu/registers/
cntpoff_el2.rs

1// SPDX-License-Identifier: Apache-2.0 OR MIT
2//
3// Copyright (c) 2024 by the author(s)
4//
5// Author(s):
6//   - Sangwan Kwon <sangwan.kwon@samsung.com>
7
8//! Counter-timer Physical Offset register - EL2
9//!
10//! Holds the 64-bit physical offset.
11//! This is the offset for the AArch64 physical timers and counters
12//! when Enhanced Counter Virtualization is enabled.
13
14use tock_registers::interfaces::{Readable, Writeable};
15
16pub struct Reg;
17
18impl Readable for Reg {
19    type T = u64;
20    type R = ();
21
22    sys_coproc_read_raw!(u64, "CNTPOFF_EL2", "x");
23}
24
25impl Writeable for Reg {
26    type T = u64;
27    type R = ();
28
29    sys_coproc_write_raw!(u64, "CNTPOFF_EL2", "x");
30}
31
32pub const CNTPOFF_EL2: Reg = Reg {};