1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
// SPDX-License-Identifier: Apache-2.0
// Copyright (c) 2026 Fábio Henrique de Lima Silva (fhl.bsb@gmail.com) All rights reserved.
//! SIMD linear algebra kernels (GEMM, GEMV, Dot Product).
//!
//! This module is the high-throughput engine of NAM-rs, responsible for the
//! massive multiplication of weights by neural network states.
//!
//! # Performance Strategies
//! - **ILP (Instruction Level Parallelism)**: Multiple accumulators to saturate the FMA ports.
//! - **Interleaved Layout**: Weights organized to maximize data reuse in registers.
//! - **Tiling**: Block processing to optimize data locality.
//!
//! Extracted from `simd/avx2.rs` and `simd/avx512.rs`.
//! Contains AVX2 and AVX-512 implementations side by side, organized by operation.
/// 16-wide dot-product kernels: AVX-512 f32 and scalar reference oracle.
/// 4-wide dot-product kernels: AVX2/AVX-512 f32 with ILP accumulation.
/// 8-wide dot-product kernels: AVX2 f32 and scalar reference oracle.
/// Scalar dot-product implementations used as test/bench oracles.
/// Batched GEMM kernels: fused residual-add GEMV batch with AVX2/AVX-512.
/// General matrix-vector multiplication: f16/f32, overwrite and fused variants.
/// 4-gate GEMV: specialized kernels for LSTM gate-block weight multiplication.
/// BF16 matrix-vector multiplication with VNNI acceleration.
pub use *;
pub use *;
pub use *;
pub use *;
pub use *;
pub use *;
pub use *;
pub use *;
pub use dot_product_8x_f32_scalar;
pub use *;
/// Test/bench oracle only — not for production dispatch.
pub use dot_product_16x_f32_scalar;
pub use *;
pub use *;
pub use *;
pub use *;