Enum cortex_a::regs::SCR_EL3::SMD::Value[−][src]

#[repr(u64)]pub enum Value {
    SmcEnabled,
    SmcDisabled,
}

Secure Monitor call Disable

0 The SMC instruction is enabled at EL1, EL2, and EL3.

1 The SMC instruction is undefined at all exception levels. At EL1, in the Non-secure state, the HCR_EL2.TSC bit has priority over this control.

Variants

SmcEnabled
SmcDisabled

Trait Implementations

impl TryFromValue<u64> for Value[src]

type EnumType = Value

Auto Trait Implementations

impl Send for Value[src]

impl Sync for Value[src]

impl Unpin for Value[src]

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.