pub struct SharedSpiLogicState {
pub lcd_cs_low: bool,
pub sd_cs_low: bool,
pub gpio35: SharedGpio35Role,
}Expand description
Pure CoreS3 shared-SPI invariant model used by host tests and docs.
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§lcd_cs_low: bool§sd_cs_low: bool§gpio35: SharedGpio35RoleImplementations§
Sourcepub const SAFE_IDLE: Self
pub const SAFE_IDLE: Self
Safe CoreS3 shared-SPI idle state: both CS lines high and GPIO35 MISO-safe.
Sourcepub const fn begin_lcd(self) -> Self
pub const fn begin_lcd(self) -> Self
Begin an LCD transaction: SD CS high, GPIO35 D/C output, LCD CS low.
Sourcepub const fn begin_sd(self) -> Self
pub const fn begin_sd(self) -> Self
Begin an SD transaction: LCD CS high, GPIO35 MISO-safe, SD CS low.
Sourcepub const fn safe_idle(self) -> Self
pub const fn safe_idle(self) -> Self
End or clean up either transaction into the BSP’s safe idle state.
Sourcepub const fn invariants_hold(self) -> bool
pub const fn invariants_hold(self) -> bool
Whether the model satisfies CoreS3’s LCD/SD shared-bus invariants.
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