Enum codegem::arch::rv64::RvInstruction
source · pub enum RvInstruction {
PhiPlaceholder {
rd: VReg,
options: Vec<(Location, Value)>,
},
Integer {
rd: VReg,
value: u64,
},
AluOp {
op: RvAluOp,
rd: VReg,
rx: VReg,
ry: VReg,
},
AluOpImm {
op: RvAluOp,
rd: VReg,
rx: VReg,
imm: i16,
},
Jal {
rd: VReg,
location: Location,
clobbers: Vec<VReg>,
},
Bne {
rx: VReg,
ry: VReg,
location: Location,
},
Ret,
Load {
rd: VReg,
imm: i16,
rx: VReg,
},
Store {
rx: VReg,
imm: i16,
ry: VReg,
},
}Variants§
Trait Implementations§
source§impl Display for RvInstruction
impl Display for RvInstruction
source§impl Instr for RvInstruction
impl Instr for RvInstruction
source§fn get_regs() -> Vec<VReg>
fn get_regs() -> Vec<VReg>
Gets the registers available for selection by the register allocator.
source§fn get_arg_regs() -> Vec<VReg>
fn get_arg_regs() -> Vec<VReg>
Gets the registers that can be used as function arguments.
source§fn collect_registers<A>(&self, alloc: &mut A)where
A: RegisterAllocator,
fn collect_registers<A>(&self, alloc: &mut A)where
A: RegisterAllocator,
Collects the registers in an instruction for register allocation.
source§fn apply_reg_allocs(&mut self, alloc: &HashMap<VReg, VReg>)
fn apply_reg_allocs(&mut self, alloc: &HashMap<VReg, VReg>)
Applies the results of register allocation.
source§fn mandatory_transforms(vcode: &mut VCode<Self>)
fn mandatory_transforms(vcode: &mut VCode<Self>)
Performs transformations on the
VCode that are mandatory after register allocation.