Expand description
en: debug layer. Run control, breakpoints, GDB server (docs/cli.ja.md §4.4, §4.6).
Contract:
- Never modify target flash on attach (do not reproduce WCH OpenOCD’s behavior).
- A breakpoint is a RAM
ebreakpatch, a hardware trigger, or a flash page rewrite, in that order (seeserver). GDB is told the truth (nohwbreak+pretense like minichlink). - Only the integer registers and the PC are exposed; V4F parts’ FPU registers are not.
ja: debug 層。実行制御・breakpoint・GDB server。契約: attach 時に flash を書き換えない、 breakpoint は RAM patch → HW trigger → flash page 書き換えの順で実態どおり申告する、整数レジスタのみ出す。
Re-exports§
pub use arch::Rv32;pub use arch::Rv32CoreRegs;pub use arch::Rv32RegId;pub use server::Ch32Target;
Modules§
- arch
- en: A minimal RISC-V RV32 architecture for gdbstub: 32 integer GPRs plus the PC, all u32,
in the order GDB’s
riscv:rv32core.xml expects (x0..x31, then pc). FPU/CSR registers are not exposed. ja: gdbstub 用の最小 RISC-V RV32 定義。GPR 32 本 + PC(すべて u32)を GDB の core.xml 順 (x0..x31, pc)で並べる。FPU/CSR は出さない。 - server
- en: A gdbstub
Targetfor a CH32 RISC-V core reached over aDtmAccesstransport. Supports registers, memory read/write, halt/continue/single-step, and breakpoints. AbreakGDB requests as software (Z0) is placed by the cheapest working mechanism, in order: a RAMebreakmemory-patch; else a hardware execute trigger when the core has a free slot (no wear); else a flash software breakpoint that rewrites the containing flash page (works on triggerless cores, at the cost of flash wear). Hardware breakpoints use the RISC-V trigger module (measured: 4 slots on QingKe V4F/CH32V307 and V4C/CH32X035, live-fire confirmed; 0 on V4B/CH32V203, V2A/CH32V003, V3/CH32V103 - detected dynamically). Flash software breakpoints need a verified FLASH-controller page profile; a family without one refuses them. Attach does not modify flash; flash breakpoints are removed and pages restored on detach (docs/cli.ja.md §4.6). ja:DtmAccess上の CH32 RISC-V core 用 gdbstub Target。register・memory R/W・ halt/continue/step・breakpoint。GDB が software(Z0)で要求したbreakは、動く中で最も安い 手段の順(RAMebreakpatch → 空き HW trigger〔摩耗なし〕→ flash page 書き換えの flash SW breakpoint〔trigger 無し core でも効くが flash 摩耗あり〕)で張る。hardware breakpoint は RISC-V trigger module(実測: V4F/V307・V4C/X035 は 4 slot 実発火、V4B/V203・V2A/V003・V3/V103 は 0。動的検出)。flash SW breakpoint は検証済み FLASH-controller profile が必要(無い family では 断る)。attach で flash を書き換えず、flash breakpoint は detach 時に外して page を復元する。