pub enum CpuTier {
Scalar,
Avx2,
Avx512,
Avx512Vnni,
Neon,
NeonDotprod,
NeonI8mm,
}Expand description
Ordered CPU capability tier. Higher is more capable.
Ord is derived from declaration order, so within a single architecture the
comparison is meaningful (Scalar < Avx2 < Avx512, Scalar < Neon < NeonDotprod < NeonI8mm). Cross-architecture comparisons are nonsensical but
harmless — only one architecture’s variants are ever produced at runtime.
Variants§
Scalar
Portable scalar reference path. Always available.
Avx2
x86_64 AVX2 + FMA. Also the threshold for the x86 int8 GEMM/GEMV path:
dpbusd is emulated with maddubs+madd here, so every tier from this
one up runs the same int8 kernels for Q4_0/Q8_0/Q4_K/Q6_K.
Avx512
x86_64 AVX-512 (needs only avx512f). Produced when the default-on
avx512 crate feature is enabled; disable it to cap the x86 tier at
AVX2.
Its own contribution is now narrow: the 512-bit f32 vec_dot for
Q8_0/Q4_0, plus the AVX-512 activation quantizer (which needs
avx512vl on top). The production GEMM and GEMV at this tier are the
CpuTier::Avx2 int8 kernels — see cpu::avx512_quantizer_available.
Avx512Vnni
x86_64 AVX-512 + VNNI (avx512vnni + avx512vl) — the x86 analogue of
CpuTier::NeonI8mm. Runs the same int8 kernels as CpuTier::Avx2
with a native dpbusd instead of the emulation, wider tiles, and a
512-bit activation quantizer. This tier is a speed difference, not a
capability one — the dtype coverage is identical.
Neon
aarch64 baseline NEON.
NeonDotprod
aarch64 NEON + dotprod (FEAT_DotProd, vdotq_s32).
NeonI8mm
aarch64 NEON + i8mm (FEAT_I8MM, vmmlaq_s32) — Q8_0 and Q4_0 GEMM; other
ops use the dotprod path (i8mm implies dotprod).
Implementations§
Trait Implementations§
impl Copy for CpuTier
impl Eq for CpuTier
Source§impl Ord for CpuTier
impl Ord for CpuTier
1.21.0 (const: unstable) · Source§fn max(self, other: Self) -> Selfwhere
Self: Sized,
fn max(self, other: Self) -> Selfwhere
Self: Sized,
1.21.0 (const: unstable) · Source§fn min(self, other: Self) -> Selfwhere
Self: Sized,
fn min(self, other: Self) -> Selfwhere
Self: Sized,
Source§impl PartialOrd for CpuTier
impl PartialOrd for CpuTier
impl StructuralPartialEq for CpuTier
Auto Trait Implementations§
impl Freeze for CpuTier
impl RefUnwindSafe for CpuTier
impl Send for CpuTier
impl Sync for CpuTier
impl Unpin for CpuTier
impl UnsafeUnpin for CpuTier
impl UnwindSafe for CpuTier
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
Source§impl<T> Instrument for T
impl<T> Instrument for T
Source§fn instrument(self, span: Span) -> Instrumented<Self> ⓘ
fn instrument(self, span: Span) -> Instrumented<Self> ⓘ
Source§fn in_current_span(self) -> Instrumented<Self> ⓘ
fn in_current_span(self) -> Instrumented<Self> ⓘ
Source§impl<T> IntoEither for T
impl<T> IntoEither for T
Source§fn into_either(self, into_left: bool) -> Either<Self, Self> ⓘ
fn into_either(self, into_left: bool) -> Either<Self, Self> ⓘ
self into a Left variant of Either<Self, Self>
if into_left is true.
Converts self into a Right variant of Either<Self, Self>
otherwise. Read moreSource§fn into_either_with<F>(self, into_left: F) -> Either<Self, Self> ⓘ
fn into_either_with<F>(self, into_left: F) -> Either<Self, Self> ⓘ
self into a Left variant of Either<Self, Self>
if into_left(&self) returns true.
Converts self into a Right variant of Either<Self, Self>
otherwise. Read more