Struct CpuFeatures 

pub struct CpuFeatures {
    pub tier: CpuTier,
    pub avx2: bool,
    pub fma: bool,
    pub avx512f: bool,
    pub avx512bw: bool,
    pub avx512vl: bool,
    pub avx512vnni: bool,
    pub neon: bool,
    pub dotprod: bool,
    pub i8mm: bool,
    pub fp16: bool,
}

Resolved CPU capabilities for this host.

tier is the selection the dispatchers act on (capped at implemented kernels); the individual bools are the raw detection results.

Fields

tier: CpuTier

Best tier cera has kernels for on this host (see module docs).

avx2: bool

AVX2 (256-bit integer and float SIMD).

fma: bool

Fused multiply-add.

avx512f: bool

AVX-512 foundation.

avx512bw: bool

AVX-512 byte and word instructions.

avx512vl: bool

AVX-512 vector-length extensions.

avx512vnni: bool

AVX-512 VNNI (dpbusd, the int8 dot product).

neon: bool

NEON. Mandatory on aarch64; probed anyway for honest reporting.

dotprod: bool

FEAT_DotProd (sdot/udot), ARMv8.2.

i8mm: bool

FEAT_I8MM (smmla), ARMv8.6.

fp16: bool

FEAT_FP16. Needed only to declare what simd::neon::f16_bits_to_f32 uses: core::arch’s vcvt_f32_f16 is gated neon,fp16 because its operand type is float16x4_t, even though the FCVTL it lowers to is baseline ARMv8.0-A and cannot trap on any AArch64 core. Detected so the declaration is honest rather than relying on FEAT_I8MM (v8.6) implying FEAT_FP16 (v8.2), the same reason the i8mm parity test gates on dotprod instead of leaning on i8mm implying it.

Implementations

impl CpuFeatures

pub fn report(&self) -> String

Human-readable one-line summary for CLI inspect / bug reports, e.g. cpu: tier=avx2 [avx2 fma] or cpu: tier=neon+dotprod [neon dotprod fp16].

Shares active_flags with Self::descriptor, so it moves whenever that list gains an entry.

pub fn descriptor(&self) -> String

Compact CPU-variant descriptor for telemetry: the active SIMD features joined by commas, e.g. "neon,dotprod,i8mm,fp16" or "avx2,fma", falling back to the tier label (e.g. "scalar") when no accelerated features are present. Deterministic on a given host, so it can key a benchmark submission’s CPU-variant field (the analog of llama.cpp’s ggml CPU-backend descriptor).

Stable for a given set of detected features, not across cera versions: adding a flag to active_flags changes the string for every host that reports it. That happened once already, when fp16 was added, which moved it on every aarch64 host from v8.2 on (so, in practice, all of them except pre-FEAT_FP16 parts like Cortex-A53/A72). Treat the descriptor as a grouping key within a release rather than a join key across them.

pub fn ensure_supported(&self) -> Result<(), String>

Verify the host can safely run cera’s compiled kernels.

Every aarch64 GEMV/GEMM entry point in super::simd::neon now runtime- dispatches between its dotprod kernel and a plain-NEON fallback, so dotprod is an accelerator rather than a hard requirement and NEON (mandatory on aarch64) is always sufficient. x86_64 always has a scalar fallback. This is therefore a no-op today, kept as the hook for any future hard ISA requirement.

Trait Implementations

impl Clone for CpuFeatures

fn clone(&self) -> CpuFeatures

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for CpuFeatures

impl Debug for CpuFeatures

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Eq for CpuFeatures

impl PartialEq for CpuFeatures

fn eq(&self, other: &CpuFeatures) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for CpuFeatures